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Message-ID: <YPHpsO5LlQRQxj9y@yoga>
Date:   Fri, 16 Jul 2021 15:18:56 -0500
From:   Bjorn Andersson <bjorn.andersson@...aro.org>
To:     Rajendra Nayak <rnayak@...eaurora.org>
Cc:     ulf.hansson@...aro.org, viresh.kumar@...aro.org,
        linux-pm@...r.kernel.org, devicetree@...r.kernel.org,
        linux-kernel@...r.kernel.org, linux-arm-msm@...r.kernel.org,
        swboyd@...omium.org, rojay@...eaurora.org, stephan@...hold.net
Subject: Re: [PATCH v4 2/2] arm64: dts: sc7180: Add required-opps for i2c

On Fri 16 Jul 05:00 CDT 2021, Rajendra Nayak wrote:

> qup-i2c devices on sc7180 are clocked with a fixed clock (19.2 MHz)
> Though qup-i2c does not support DVFS, it still needs to vote for a
> performance state on 'CX' to satisfy the 19.2 Mhz clock frequency
> requirement.
> 

Sounds good, but...

> Use 'required-opps' to pass this information from
> device tree, and also add the power-domains property to specify
> the CX power-domain.
> 

..is the required-opps really needed with my rpmhpd patch in place?

Regards,
Bjorn

> Signed-off-by: Rajendra Nayak <rnayak@...eaurora.org>
> ---
>  arch/arm64/boot/dts/qcom/sc7180.dtsi | 24 ++++++++++++++++++++++++
>  1 file changed, 24 insertions(+)
> 
> diff --git a/arch/arm64/boot/dts/qcom/sc7180.dtsi b/arch/arm64/boot/dts/qcom/sc7180.dtsi
> index a5d58eb..cd30185 100644
> --- a/arch/arm64/boot/dts/qcom/sc7180.dtsi
> +++ b/arch/arm64/boot/dts/qcom/sc7180.dtsi
> @@ -785,8 +785,10 @@
>  						<&gem_noc MASTER_APPSS_PROC 0 &config_noc SLAVE_QUP_0 0>,
>  						<&aggre1_noc MASTER_QUP_0 0 &mc_virt SLAVE_EBI1 0>;
>  				interconnect-names = "qup-core", "qup-config",
>  							"qup-memory";
> +				power-domains = <&rpmhpd SC7180_CX>;
> +				required-opps = <&rpmhpd_opp_low_svs>;
>  				status = "disabled";
>  			};
>  
>  			spi0: spi@...000 {
> @@ -837,8 +839,10 @@
>  						<&gem_noc MASTER_APPSS_PROC 0 &config_noc SLAVE_QUP_0 0>,
>  						<&aggre1_noc MASTER_QUP_0 0 &mc_virt SLAVE_EBI1 0>;
>  				interconnect-names = "qup-core", "qup-config",
>  							"qup-memory";
> +				power-domains = <&rpmhpd SC7180_CX>;
> +				required-opps = <&rpmhpd_opp_low_svs>;
>  				status = "disabled";
>  			};
>  
>  			spi1: spi@...000 {
> @@ -889,8 +893,10 @@
>  						<&gem_noc MASTER_APPSS_PROC 0 &config_noc SLAVE_QUP_0 0>,
>  						<&aggre1_noc MASTER_QUP_0 0 &mc_virt SLAVE_EBI1 0>;
>  				interconnect-names = "qup-core", "qup-config",
>  							"qup-memory";
> +				power-domains = <&rpmhpd SC7180_CX>;
> +				required-opps = <&rpmhpd_opp_low_svs>;
>  				status = "disabled";
>  			};
>  
>  			uart2: serial@...000 {
> @@ -923,8 +929,10 @@
>  						<&gem_noc MASTER_APPSS_PROC 0 &config_noc SLAVE_QUP_0 0>,
>  						<&aggre1_noc MASTER_QUP_0 0 &mc_virt SLAVE_EBI1 0>;
>  				interconnect-names = "qup-core", "qup-config",
>  							"qup-memory";
> +				power-domains = <&rpmhpd SC7180_CX>;
> +				required-opps = <&rpmhpd_opp_low_svs>;
>  				status = "disabled";
>  			};
>  
>  			spi3: spi@...000 {
> @@ -975,8 +983,10 @@
>  						<&gem_noc MASTER_APPSS_PROC 0 &config_noc SLAVE_QUP_0 0>,
>  						<&aggre1_noc MASTER_QUP_0 0 &mc_virt SLAVE_EBI1 0>;
>  				interconnect-names = "qup-core", "qup-config",
>  							"qup-memory";
> +				power-domains = <&rpmhpd SC7180_CX>;
> +				required-opps = <&rpmhpd_opp_low_svs>;
>  				status = "disabled";
>  			};
>  
>  			uart4: serial@...000 {
> @@ -1009,8 +1019,10 @@
>  						<&gem_noc MASTER_APPSS_PROC 0 &config_noc SLAVE_QUP_0 0>,
>  						<&aggre1_noc MASTER_QUP_0 0 &mc_virt SLAVE_EBI1 0>;
>  				interconnect-names = "qup-core", "qup-config",
>  							"qup-memory";
> +				power-domains = <&rpmhpd SC7180_CX>;
> +				required-opps = <&rpmhpd_opp_low_svs>;
>  				status = "disabled";
>  			};
>  
>  			spi5: spi@...000 {
> @@ -1074,8 +1086,10 @@
>  						<&gem_noc MASTER_APPSS_PROC 0 &config_noc SLAVE_QUP_1 0>,
>  						<&aggre2_noc MASTER_QUP_1 0 &mc_virt SLAVE_EBI1 0>;
>  				interconnect-names = "qup-core", "qup-config",
>  							"qup-memory";
> +				power-domains = <&rpmhpd SC7180_CX>;
> +				required-opps = <&rpmhpd_opp_low_svs>;
>  				status = "disabled";
>  			};
>  
>  			spi6: spi@...000 {
> @@ -1126,8 +1140,10 @@
>  						<&gem_noc MASTER_APPSS_PROC 0 &config_noc SLAVE_QUP_1 0>,
>  						<&aggre2_noc MASTER_QUP_1 0 &mc_virt SLAVE_EBI1 0>;
>  				interconnect-names = "qup-core", "qup-config",
>  							"qup-memory";
> +				power-domains = <&rpmhpd SC7180_CX>;
> +				required-opps = <&rpmhpd_opp_low_svs>;
>  				status = "disabled";
>  			};
>  
>  			uart7: serial@...000 {
> @@ -1160,8 +1176,10 @@
>  						<&gem_noc MASTER_APPSS_PROC 0 &config_noc SLAVE_QUP_1 0>,
>  						<&aggre2_noc MASTER_QUP_1 0 &mc_virt SLAVE_EBI1 0>;
>  				interconnect-names = "qup-core", "qup-config",
>  							"qup-memory";
> +				power-domains = <&rpmhpd SC7180_CX>;
> +				required-opps = <&rpmhpd_opp_low_svs>;
>  				status = "disabled";
>  			};
>  
>  			spi8: spi@...000 {
> @@ -1212,8 +1230,10 @@
>  						<&gem_noc MASTER_APPSS_PROC 0 &config_noc SLAVE_QUP_1 0>,
>  						<&aggre2_noc MASTER_QUP_1 0 &mc_virt SLAVE_EBI1 0>;
>  				interconnect-names = "qup-core", "qup-config",
>  							"qup-memory";
> +				power-domains = <&rpmhpd SC7180_CX>;
> +				required-opps = <&rpmhpd_opp_low_svs>;
>  				status = "disabled";
>  			};
>  
>  			uart9: serial@...000 {
> @@ -1246,8 +1266,10 @@
>  						<&gem_noc MASTER_APPSS_PROC 0 &config_noc SLAVE_QUP_1 0>,
>  						<&aggre2_noc MASTER_QUP_1 0 &mc_virt SLAVE_EBI1 0>;
>  				interconnect-names = "qup-core", "qup-config",
>  							"qup-memory";
> +				power-domains = <&rpmhpd SC7180_CX>;
> +				required-opps = <&rpmhpd_opp_low_svs>;
>  				status = "disabled";
>  			};
>  
>  			spi10: spi@...000 {
> @@ -1298,8 +1320,10 @@
>  						<&gem_noc MASTER_APPSS_PROC 0 &config_noc SLAVE_QUP_1 0>,
>  						<&aggre2_noc MASTER_QUP_1 0 &mc_virt SLAVE_EBI1 0>;
>  				interconnect-names = "qup-core", "qup-config",
>  							"qup-memory";
> +				power-domains = <&rpmhpd SC7180_CX>;
> +				required-opps = <&rpmhpd_opp_low_svs>;
>  				status = "disabled";
>  			};
>  
>  			spi11: spi@...000 {
> -- 
> QUALCOMM INDIA, on behalf of Qualcomm Innovation Center, Inc. is a member
> of Code Aurora Forum, hosted by The Linux Foundation
> 

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