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Message-Id: <20210717121112.3248-13-digetx@gmail.com>
Date: Sat, 17 Jul 2021 15:11:12 +0300
From: Dmitry Osipenko <digetx@...il.com>
To: Thierry Reding <treding@...dia.com>,
Jonathan Hunter <jonathanh@...dia.com>,
Mark Brown <broonie@...nel.org>,
Rob Herring <robh+dt@...nel.org>,
Sebastian Reichel <sre@...nel.org>,
Peter Chen <peter.chen@...nel.org>,
Greg Kroah-Hartman <gregkh@...uxfoundation.org>,
Felipe Balbi <balbi@...nel.org>,
David Heidelberg <david@...t.cz>
Cc: devicetree@...r.kernel.org, linux-pm@...r.kernel.org,
linux-usb@...r.kernel.org, linux-kernel@...r.kernel.org,
linux-tegra@...r.kernel.org
Subject: [PATCH v4 12/12] arm64: tegra132: Add new properties to USB PHY device-tree node
Add new properties to USB PHYs needed for enabling USB OTG mode.
Signed-off-by: Dmitry Osipenko <digetx@...il.com>
---
arch/arm64/boot/dts/nvidia/tegra132.dtsi | 6 ++++++
1 file changed, 6 insertions(+)
diff --git a/arch/arm64/boot/dts/nvidia/tegra132.dtsi b/arch/arm64/boot/dts/nvidia/tegra132.dtsi
index 9928a87f593a..f79a66226457 100644
--- a/arch/arm64/boot/dts/nvidia/tegra132.dtsi
+++ b/arch/arm64/boot/dts/nvidia/tegra132.dtsi
@@ -1123,6 +1123,7 @@ phy1: usb-phy@...00000 {
compatible = "nvidia,tegra124-usb-phy", "nvidia,tegra30-usb-phy";
reg = <0x0 0x7d000000 0x0 0x4000>,
<0x0 0x7d000000 0x0 0x4000>;
+ interrupts = <GIC_SPI 20 IRQ_TYPE_LEVEL_HIGH>;
phy_type = "utmi";
clocks = <&tegra_car TEGRA124_CLK_USBD>,
<&tegra_car TEGRA124_CLK_PLL_U>,
@@ -1142,6 +1143,7 @@ phy1: usb-phy@...00000 {
nvidia,hsdiscon-level = <5>;
nvidia,xcvr-hsslew = <12>;
nvidia,has-utmi-pad-registers;
+ nvidia,pmc = <&tegra_pmc 0>;
status = "disabled";
};
@@ -1162,6 +1164,7 @@ phy2: usb-phy@...04000 {
compatible = "nvidia,tegra124-usb-phy", "nvidia,tegra30-usb-phy";
reg = <0x0 0x7d004000 0x0 0x4000>,
<0x0 0x7d000000 0x0 0x4000>;
+ interrupts = <GIC_SPI 21 IRQ_TYPE_LEVEL_HIGH>;
phy_type = "utmi";
clocks = <&tegra_car TEGRA124_CLK_USB2>,
<&tegra_car TEGRA124_CLK_PLL_U>,
@@ -1180,6 +1183,7 @@ phy2: usb-phy@...04000 {
nvidia,hssquelch-level = <2>;
nvidia,hsdiscon-level = <5>;
nvidia,xcvr-hsslew = <12>;
+ nvidia,pmc = <&tegra_pmc 1>;
status = "disabled";
};
@@ -1200,6 +1204,7 @@ phy3: usb-phy@...08000 {
compatible = "nvidia,tegra124-usb-phy", "nvidia,tegra30-usb-phy";
reg = <0x0 0x7d008000 0x0 0x4000>,
<0x0 0x7d000000 0x0 0x4000>;
+ interrupts = <GIC_SPI 97 IRQ_TYPE_LEVEL_HIGH>;
phy_type = "utmi";
clocks = <&tegra_car TEGRA124_CLK_USB3>,
<&tegra_car TEGRA124_CLK_PLL_U>,
@@ -1218,6 +1223,7 @@ phy3: usb-phy@...08000 {
nvidia,hssquelch-level = <2>;
nvidia,hsdiscon-level = <5>;
nvidia,xcvr-hsslew = <12>;
+ nvidia,pmc = <&tegra_pmc 2>;
status = "disabled";
};
--
2.32.0
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