[<prev] [next>] [<thread-prev] [thread-next>] [day] [month] [year] [list]
Message-Id: <20210719144948.808641499@linuxfoundation.org>
Date: Mon, 19 Jul 2021 16:54:14 +0200
From: Greg Kroah-Hartman <gregkh@...uxfoundation.org>
To: linux-kernel@...r.kernel.org
Cc: Greg Kroah-Hartman <gregkh@...uxfoundation.org>,
stable@...r.kernel.org, Guenter Roeck <linux@...ck-us.net>,
Andy Shevchenko <andriy.shevchenko@...ux.intel.com>,
Kris Pan <kris.pan@...el.com>,
Shruthi Sanil <shruthi.sanil@...el.com>,
Wim Van Sebroeck <wim@...ux-watchdog.org>,
Sasha Levin <sashal@...nel.org>
Subject: [PATCH 5.12 192/292] watchdog: keembay: Clear either the TO or TH interrupt bit
From: Shruthi Sanil <shruthi.sanil@...el.com>
[ Upstream commit 0e36a09faea25f4564d41a0c28938199b605148e ]
During the interrupt service routine of the TimeOut interrupt and
the ThresHold interrupt, the respective interrupt clear bit
have to be cleared and not both.
Fixes: fa0f8d51e90d ("watchdog: Add watchdog driver for Intel Keembay Soc")
Reviewed-by: Guenter Roeck <linux@...ck-us.net>
Reviewed-by: Andy Shevchenko <andriy.shevchenko@...ux.intel.com>
Tested-by: Kris Pan <kris.pan@...el.com>
Signed-off-by: Shruthi Sanil <shruthi.sanil@...el.com>
Link: https://lore.kernel.org/r/20210517174953.19404-5-shruthi.sanil@intel.com
Signed-off-by: Guenter Roeck <linux@...ck-us.net>
Signed-off-by: Wim Van Sebroeck <wim@...ux-watchdog.org>
Signed-off-by: Sasha Levin <sashal@...nel.org>
---
drivers/watchdog/keembay_wdt.c | 7 ++++---
1 file changed, 4 insertions(+), 3 deletions(-)
diff --git a/drivers/watchdog/keembay_wdt.c b/drivers/watchdog/keembay_wdt.c
index 6053416b8d3d..f2a16c9933c3 100644
--- a/drivers/watchdog/keembay_wdt.c
+++ b/drivers/watchdog/keembay_wdt.c
@@ -23,7 +23,8 @@
#define TIM_WDOG_EN 0x8
#define TIM_SAFE 0xc
-#define WDT_ISR_MASK GENMASK(9, 8)
+#define WDT_TH_INT_MASK BIT(8)
+#define WDT_TO_INT_MASK BIT(9)
#define WDT_ISR_CLEAR 0x8200ff18
#define WDT_UNLOCK 0xf1d0dead
#define WDT_LOAD_MAX U32_MAX
@@ -142,7 +143,7 @@ static irqreturn_t keembay_wdt_to_isr(int irq, void *dev_id)
struct arm_smccc_res res;
keembay_wdt_writel(wdt, TIM_WATCHDOG, 1);
- arm_smccc_smc(WDT_ISR_CLEAR, WDT_ISR_MASK, 0, 0, 0, 0, 0, 0, &res);
+ arm_smccc_smc(WDT_ISR_CLEAR, WDT_TO_INT_MASK, 0, 0, 0, 0, 0, 0, &res);
dev_crit(wdt->wdd.parent, "Intel Keem Bay non-sec wdt timeout.\n");
emergency_restart();
@@ -156,7 +157,7 @@ static irqreturn_t keembay_wdt_th_isr(int irq, void *dev_id)
keembay_wdt_set_pretimeout(&wdt->wdd, 0x0);
- arm_smccc_smc(WDT_ISR_CLEAR, WDT_ISR_MASK, 0, 0, 0, 0, 0, 0, &res);
+ arm_smccc_smc(WDT_ISR_CLEAR, WDT_TH_INT_MASK, 0, 0, 0, 0, 0, 0, &res);
dev_crit(wdt->wdd.parent, "Intel Keem Bay non-sec wdt pre-timeout.\n");
watchdog_notify_pretimeout(&wdt->wdd);
--
2.30.2
Powered by blists - more mailing lists