linux-kernel - Re: [PATCH v2 3/4] clk: renesas: r9a07g044-cpg: Add clock and reset entries for ADC

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Message-ID: <CAMuHMdW6vsJ_wg9JPn5jnmJ8q1LxD5s8ai-kdFmkc8joGFe6+Q@mail.gmail.com>
Date:   Mon, 19 Jul 2021 11:15:03 +0200
From:   Geert Uytterhoeven <geert@...ux-m68k.org>
To:     Lad Prabhakar <prabhakar.mahadev-lad.rj@...renesas.com>
Cc:     Rob Herring <robh+dt@...nel.org>,
        Jonathan Cameron <jic23@...nel.org>,
        Lars-Peter Clausen <lars@...afoo.de>,
        Michael Turquette <mturquette@...libre.com>,
        Magnus Damm <magnus.damm@...il.com>,
        Stephen Boyd <sboyd@...nel.org>,
        Philipp Zabel <p.zabel@...gutronix.de>,
        Alexandru Ardelean <aardelean@...iqon.com>,
        linux-iio@...r.kernel.org,
        "open list:OPEN FIRMWARE AND FLATTENED DEVICE TREE BINDINGS" 
        <devicetree@...r.kernel.org>,
        linux-clk <linux-clk@...r.kernel.org>,
        Linux Kernel Mailing List <linux-kernel@...r.kernel.org>,
        Linux-Renesas <linux-renesas-soc@...r.kernel.org>,
        Prabhakar <prabhakar.csengg@...il.com>,
        Biju Das <biju.das.jz@...renesas.com>
Subject: Re: [PATCH v2 3/4] clk: renesas: r9a07g044-cpg: Add clock and reset
 entries for ADC

On Mon, Jul 19, 2021 at 10:59 AM Lad Prabhakar
<prabhakar.mahadev-lad.rj@...renesas.com> wrote:
> Add clock and reset entries for ADC block in CPG driver.
>
> Signed-off-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@...renesas.com>
> Reviewed-by: Biju Das <biju.das.jz@...renesas.com>

Reviewed-by: Geert Uytterhoeven <geert+renesas@...der.be>
i.e. will queue in renesas-clk-for-v5.15.

Gr{oetje,eeting}s,

                        Geert

-- 
Geert Uytterhoeven -- There's lots of Linux beyond ia32 -- geert@...ux-m68k.org

In personal conversations with technical people, I call myself a hacker. But
when I'm talking to journalists I just say "programmer" or something like that.
                                -- Linus Torvalds