[<prev] [next>] [<thread-prev] [day] [month] [year] [list]
Message-ID: <CAJMQK-jsbudDCj2TjS13_z--5j+2heUgLYsCTQ23Xd7T4wUZYQ@mail.gmail.com>
Date: Tue, 20 Jul 2021 13:00:48 +0800
From: Hsin-Yi Wang <hsinyi@...omium.org>
To: Yongqiang Niu <yongqiang.niu@...iatek.com>
Cc: Chun-Kuang Hu <chunkuang.hu@...nel.org>,
Rob Herring <robh+dt@...nel.org>,
Matthias Brugger <matthias.bgg@...il.com>,
Philipp Zabel <p.zabel@...gutronix.de>,
David Airlie <airlied@...ux.ie>,
Daniel Vetter <daniel@...ll.ch>,
Jassi Brar <jassisinghbrar@...il.com>,
Fabien Parent <fparent@...libre.com>,
Dennis YC Hsieh <dennis-yc.hsieh@...iatek.com>,
Devicetree List <devicetree@...r.kernel.org>,
"moderated list:ARM/FREESCALE IMX / MXC ARM ARCHITECTURE"
<linux-arm-kernel@...ts.infradead.org>,
"moderated list:ARM/Mediatek SoC support"
<linux-mediatek@...ts.infradead.org>,
lkml <linux-kernel@...r.kernel.org>,
dri-devel <dri-devel@...ts.freedesktop.org>,
Project_Global_Chrome_Upstream_Group@...iatek.com
Subject: Re: [PATCH v2] drm/mediatek: add dither 6 setting
On Mon, Jul 19, 2021 at 4:24 PM Yongqiang Niu
<yongqiang.niu@...iatek.com> wrote:
>
> in the first version dither patch
> https://patchwork.kernel.org/project/linux-mediatek/patch/1553667561-25447-13-git-send-email-yongqiang.niu@mediatek.com/
> dither 6 setting is included in that patch
I think you don't need to link the first version here.
> bit 1 is lfsr_en( "Enables LFSR-type dithering"), need enable
> bit 2 is rdither_en(Enables running order dithering), need disable
> in this issue
> https://partnerissuetracker.corp.google.com/issues/190643544
Can you describe the issue in text instead of pasting a link that is
not accessible to everyone?
>
> dither 6 setting missed in set dither common patch
> https://git.kernel.org/pub/scm/linux/kernel/git/next/linux-next.git/commit/drivers/gpu/drm/mediatek/mtk_drm_ddp_comp.c?h=next-20210430&id=a6b7c98afdcad0f149010ae028b24f2d0dc24cdb
If this is fixing a previous patch, please add Fixes: tag instead of
pasting a link here.
>
> Signed-off-by: Yongqiang Niu <yongqiang.niu@...iatek.com>
> ---
> drivers/gpu/drm/mediatek/mtk_drm_ddp_comp.c | 2 ++
> 1 file changed, 2 insertions(+)
>
> diff --git a/drivers/gpu/drm/mediatek/mtk_drm_ddp_comp.c b/drivers/gpu/drm/mediatek/mtk_drm_ddp_comp.c
> index 99cbf44..7dd8e05 100644
> --- a/drivers/gpu/drm/mediatek/mtk_drm_ddp_comp.c
> +++ b/drivers/gpu/drm/mediatek/mtk_drm_ddp_comp.c
> @@ -26,6 +26,7 @@
> #define DISP_OD_CFG 0x0020
> #define DISP_OD_SIZE 0x0030
> #define DISP_DITHER_5 0x0114
> +#define DISP_DITHER_6 0x0118
> #define DISP_DITHER_7 0x011c
> #define DISP_DITHER_15 0x013c
> #define DISP_DITHER_16 0x0140
> @@ -135,6 +136,7 @@ void mtk_dither_set_common(void __iomem *regs, struct cmdq_client_reg *cmdq_reg,
>
> if (bpc >= MTK_MIN_BPC) {
> mtk_ddp_write(cmdq_pkt, 0, cmdq_reg, regs, DISP_DITHER_5);
> + mtk_ddp_write(cmdq_pkt, 0x3002, cmdq_reg, regs, DISP_DITHER_6);
> mtk_ddp_write(cmdq_pkt, 0, cmdq_reg, regs, DISP_DITHER_7);
> mtk_ddp_write(cmdq_pkt,
> DITHER_LSB_ERR_SHIFT_R(MTK_MAX_BPC - bpc) |
> --
> 1.8.1.1.dirty
>
Powered by blists - more mailing lists