[<prev] [next>] [<thread-prev] [thread-next>] [day] [month] [year] [list]
Message-ID: <40f735b0f43873f1a68c53eaab0e1590@codeaurora.org>
Date: Tue, 20 Jul 2021 12:24:39 +0530
From: Prasad Malisetty <pmaliset@...eaurora.org>
To: Stephen Boyd <swboyd@...omium.org>
Cc: agross@...nel.org, bhelgaas@...gle.com, bjorn.andersson@...aro.org,
lorenzo.pieralisi@....com, robh+dt@...nel.org,
svarbanov@...sol.com, devicetree@...r.kernel.org,
linux-arm-msm@...r.kernel.org, linux-usb@...r.kernel.org,
linux-kernel@...r.kernel.org, dianders@...omium.org,
mka@...omium.org, vbadigan@...eaurora.org, sallenki@...eaurora.org
Subject: Re: [PATCH v4 2/4] arm64: dts: qcom: sc7280: Add PCIe and PHY related
nodes
On 2021-07-17 01:01, Stephen Boyd wrote:
> Quoting Prasad Malisetty (2021-07-16 06:58:45)
>> diff --git a/arch/arm64/boot/dts/qcom/sc7280.dtsi
>> b/arch/arm64/boot/dts/qcom/sc7280.dtsi
>> index a8c274a..06baf88 100644
>> --- a/arch/arm64/boot/dts/qcom/sc7280.dtsi
>> +++ b/arch/arm64/boot/dts/qcom/sc7280.dtsi
>> @@ -15,6 +15,7 @@
>> #include <dt-bindings/reset/qcom,sdm845-pdc.h>
>> #include <dt-bindings/soc/qcom,rpmh-rsc.h>
>> #include <dt-bindings/thermal/thermal.h>
>> +#include <dt-bindings/gpio/gpio.h>
>>
>> / {
>> interrupt-parent = <&intc>;
>> @@ -546,6 +547,118 @@
>> #power-domain-cells = <1>;
>
> Is this the gpucc node? At address 3d90000? Please sort the nodes based
> on their address, so this would be 1c08000 which comes before gpucc and
> some others in this file.
>
sure, I will move it accordingly.
>> };
>>
>> + pcie1: pci@...8000 {
>> + compatible = "qcom,pcie-sc7280",
>> "qcom,pcie-sm8250", "snps,dw-pcie";
>> + reg = <0 0x01c08000 0 0x3000>,
>> + <0 0x40000000 0 0xf1d>,
>> + <0 0x40000f20 0 0xa8>,
>> + <0 0x40001000 0 0x1000>,
>> + <0 0x40100000 0 0x100000>;
>> +
Powered by blists - more mailing lists