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Message-ID: <a3227633-626d-10f5-c190-86dbf36a469c@collabora.com>
Date:   Tue, 20 Jul 2021 19:07:14 +0200
From:   Enric Balletbo i Serra <enric.balletbo@...labora.com>
To:     Philipp Zabel <p.zabel@...gutronix.de>,
        linux-kernel@...r.kernel.org
Cc:     chunkuang.hu@...nel.org, hsinyi@...omium.org, kernel@...labora.com,
        drinkcat@...omium.org, eizan@...omium.org,
        linux-mediatek@...ts.infradead.org, matthias.bgg@...il.com,
        jitao.shi@...iatek.com, linux-arm-kernel@...ts.infradead.org
Subject: Re: [PATCH v2 6/7] soc: mediatek: mmsys: Add reset controller support

Hi Philipp,

Thank you to take a look

On 20/7/21 12:52, Philipp Zabel wrote:
> Hi Enric,
> 
> On Wed, 2021-07-14 at 12:11 +0200, Enric Balletbo i Serra wrote:
>> Among other features the mmsys driver should implement a reset
>> controller to be able to reset different bits from their space.
>>
>> Cc: Jitao Shi <jitao.shi@...iatek.com>
>> Suggested-by: Chun-Kuang Hu <chunkuang.hu@...nel.org>
>> Signed-off-by: Enric Balletbo i Serra <enric.balletbo@...labora.com>
> 
> The reset controller driver looks fine, just two questions below.
> 
>> ---
>>
>> (no changes since v1)
>>
>>  drivers/soc/mediatek/mtk-mmsys.c | 69 ++++++++++++++++++++++++++++++++
>>  drivers/soc/mediatek/mtk-mmsys.h |  2 +
>>  2 files changed, 71 insertions(+)
>>
>> diff --git a/drivers/soc/mediatek/mtk-mmsys.c b/drivers/soc/mediatek/mtk-mmsys.c
>> index e681029fe804..6ac4deff0164 100644
>> --- a/drivers/soc/mediatek/mtk-mmsys.c
>> +++ b/drivers/soc/mediatek/mtk-mmsys.c
> [...]
>> @@ -91,6 +95,59 @@ void mtk_mmsys_ddp_disconnect(struct device *dev,
> [...]
>> +static int mtk_mmsys_reset(struct reset_controller_dev *rcdev, unsigned long id)
>> +{
>> +	int ret;
>> +
>> +	ret = mtk_mmsys_reset_assert(rcdev, id);
>> +	if (ret)
>> +		return ret;
>> +
>> +	usleep_range(1000, 1100);
> 
> Is this known to be enough for all IP cores that can be reset by this
> controller?
> 

This time is copied from the downstream kernel, so, tbh, I am not totally sure
is enough or needed. Let me try to reach the Mediatek people for if they can
answer this.


>> +	return mtk_mmsys_reset_deassert(rcdev, id);
>> +}
>> +
>> +static const struct reset_control_ops mtk_mmsys_reset_ops = {
>> +	.assert = mtk_mmsys_reset_assert,
>> +	.deassert = mtk_mmsys_reset_deassert,
>> +	.reset = mtk_mmsys_reset,
>> +};
>> +
>>  static int mtk_mmsys_probe(struct platform_device *pdev)
>>  {
>>  	struct device *dev = &pdev->dev;
>> @@ -111,6 +168,18 @@ static int mtk_mmsys_probe(struct platform_device *pdev)
>>  		return ret;
>>  	}
>>  
>> +	spin_lock_init(&mmsys->lock);
>> +
>> +	mmsys->rcdev.owner = THIS_MODULE;
>> +	mmsys->rcdev.nr_resets = 32;
> 
> Are all bits in the MMSYS_SW0_RST_B register individual reset controls?

Yes, all are individual reset controls, mostly related to display but not all
(i.e dsi, dpi ...)

Thanks,
  Enric

> 
> regards
> Philipp
> 

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