linux-kernel - Re: [PATCH v3 3/4] dt-bindings: clock: Add DT bindings for SMU of Toshiba Visconti TMPV770x SoC

lists.openwall.net		lists / announce owl-users owl-dev john-users john-dev passwdqc-users yescrypt popa3d-users / oss-security kernel-hardening musl sabotage tlsify passwords / crypt-dev xvendor / Bugtraq Full-Disclosure linux-kernel linux-netdev linux-ext4 linux-hardening linux-cve-announce PHC
Open Source and information security mailing list archives

Hash Suite: Windows password security audit tool. GUI, reports in PDF.

[<prev] [next>] [<thread-prev] [day] [month] [year] [list]

Message-ID: <20210720015321.6gndhnblrv54ncy3@toshiba.co.jp>
Date:   Tue, 20 Jul 2021 10:53:21 +0900
From:   Nobuhiro Iwamatsu <nobuhiro1.iwamatsu@...hiba.co.jp>
To:     Rob Herring <robh@...nel.org>
Cc:     Michael Turquette <mturquette@...libre.com>,
        Stephen Boyd <sboyd@...nel.org>, linux-clk@...r.kernel.org,
        devicetree@...r.kernel.org, punit1.agrawal@...hiba.co.jp,
        yuji2.ishikawa@...hiba.co.jp, linux-arm-kernel@...ts.infradead.org,
        linux-kernel@...r.kernel.org
Subject: Re: [PATCH v3 3/4] dt-bindings: clock: Add DT bindings for SMU of
 Toshiba Visconti TMPV770x SoC

HI,

Thanks for your review.

On Wed, Jul 14, 2021 at 01:24:47PM -0600, Rob Herring wrote:
> On Thu, Jun 24, 2021 at 12:43:36PM +0900, Nobuhiro Iwamatsu wrote:
> > Add device tree bindings for SMU (System Management Unit) controller of
> > Toshiba Visconti TMPV770x SoC series.
> > 
> > Signed-off-by: Nobuhiro Iwamatsu <nobuhiro1.iwamatsu@...hiba.co.jp>
> > ---
> >  .../clock/toshiba,tmpv770x-pismu.yaml         | 50 +++++++++++++++++++
> >  1 file changed, 50 insertions(+)
> >  create mode 100644 Documentation/devicetree/bindings/clock/toshiba,tmpv770x-pismu.yaml
> > 
> > diff --git a/Documentation/devicetree/bindings/clock/toshiba,tmpv770x-pismu.yaml b/Documentation/devicetree/bindings/clock/toshiba,tmpv770x-pismu.yaml
> > new file mode 100644
> > index 000000000000..18fdf4f2831b
> > --- /dev/null
> > +++ b/Documentation/devicetree/bindings/clock/toshiba,tmpv770x-pismu.yaml
> > @@ -0,0 +1,50 @@
> > +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
> > +%YAML 1.2
> > +---
> > +$id: http://devicetree.org/schemas/clock/toshiba,tmpv770x-pismu.yaml#
> > +$schema: http://devicetree.org/meta-schemas/core.yaml#
> > +
> > +title: Toshiba Visconti5 TMPV770x SMU controller Device Tree Bindings
> > +
> > +maintainers:
> > +  - Nobuhiro Iwamatsu <nobuhiro1.iwamatsu@...hiba.co.jp>
> > +
> > +description:
> > +  Toshia Visconti5 SMU (System Management Unit) which supports the clock
> > +  and resets on TMPV770x.
> > +
> > +properties:
> > +  compatible:
> > +    const: toshiba,tmpv7708-pismu
> > +
> > +  reg:
> > +    maxItems: 1
> > +
> > +  '#clock-cells':
> > +    const: 1
> > +
> > +  '#reset-cells':
> > +    const: 1
> 
> Is there a connection to the PLLs? What are the clock inputs?

The PLL used by this driver is created by the pll driver, and these
relationships are held by the structures within this driver.
Should I move these from driver to DT?

> 
> > +
> > +required:
> > +  - compatible
> > +  - reg
> > +  - "#clock-cells"
> > +  - "#reset-cells"
> > +
> > +additionalProperties: false
> > +
> > +examples:
> > +  - |
> > +    soc {
> > +        #address-cells = <2>;
> > +        #size-cells = <2>;
> > +
> > +        pismu: pismu@...00000 {
> 
> clock-controller@...

I will fix.

> 
> > +            compatible = "toshiba,tmpv7708-pismu";
> > +            reg = <0 0x24200000 0 0x2140>;
> > +            #clock-cells = <1>;
> > +            #reset-cells = <1>;
> > +        };
> > +    };
> > +...
> > -- 
> > 2.32.0
> > 
> > 
> 

Best regards,
  Nobuhiro