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Date: Wed, 21 Jul 2021 10:48:25 +0100
From: Mike Leach <mike.leach@...aro.org>
To: James Clark <james.clark@....com>
Cc: Arnaldo Carvalho de Melo <acme@...nel.org>,
Mathieu Poirier <mathieu.poirier@...aro.org>,
Coresight ML <coresight@...ts.linaro.org>,
Leo Yan <leo.yan@...aro.org>, Al Grant <al.grant@....com>,
"Suzuki K. Poulose" <suzuki.poulose@....com>,
Anshuman Khandual <anshuman.khandual@....com>,
John Garry <john.garry@...wei.com>,
Will Deacon <will@...nel.org>,
Mark Rutland <mark.rutland@....com>,
Alexander Shishkin <alexander.shishkin@...ux.intel.com>,
Jiri Olsa <jolsa@...hat.com>,
Namhyung Kim <namhyung@...nel.org>,
linux-arm-kernel <linux-arm-kernel@...ts.infradead.org>,
Linux Kernel Mailing List <linux-kernel@...r.kernel.org>,
linux-perf-users@...r.kernel.org
Subject: Re: [PATCH 3/6] perf cs-etm: Save TRCDEVARCH register
HI James,
On Wed, 21 Jul 2021 at 10:07, James Clark <james.clark@....com> wrote:
>
> Now that the metadata has a length field we can add extra registers
> without breaking any previous versions of perf.
>
> Save the TRCDEVARCH register so that it can be used to configure the ETE
> decoder in the next commit. If the sysfs file doesn't exist then 0 will
> be saved which is an impossible register value and can also be used to
> signify that the file couldn't be read.
>
> Signed-off-by: James Clark <james.clark@....com>
> ---
> tools/perf/arch/arm/util/cs-etm.c | 13 ++++++++++++-
> tools/perf/util/cs-etm.c | 1 +
> tools/perf/util/cs-etm.h | 5 +++--
> 3 files changed, 16 insertions(+), 3 deletions(-)
>
> diff --git a/tools/perf/arch/arm/util/cs-etm.c b/tools/perf/arch/arm/util/cs-etm.c
> index 85168d87b2d7..65a863bdf5cc 100644
> --- a/tools/perf/arch/arm/util/cs-etm.c
> +++ b/tools/perf/arch/arm/util/cs-etm.c
> @@ -53,6 +53,7 @@ static const char *metadata_etmv4_ro[CS_ETMV4_PRIV_MAX] = {
> [CS_ETMV4_TRCIDR2] = "trcidr/trcidr2",
> [CS_ETMV4_TRCIDR8] = "trcidr/trcidr8",
> [CS_ETMV4_TRCAUTHSTATUS] = "mgmt/trcauthstatus",
> + [CS_ETE_TRCDEVARCH] = "mgmt/trcdevarch"
> };
>
> static bool cs_etm_is_etmv4(struct auxtrace_record *itr, int cpu);
> @@ -73,7 +74,7 @@ static int cs_etm_set_context_id(struct auxtrace_record *itr,
> if (!cs_etm_is_etmv4(itr, cpu))
> goto out;
>
> - /* Get a handle on TRCIRD2 */
> + /* Get a handle on TRCIDR2 */
> snprintf(path, PATH_MAX, "cpu%d/%s",
> cpu, metadata_etmv4_ro[CS_ETMV4_TRCIDR2]);
> err = perf_pmu__scan_file(cs_etm_pmu, path, "%x", &val);
> @@ -643,6 +644,16 @@ static void cs_etm_get_metadata(int cpu, u32 *offset,
> cs_etm_get_ro(cs_etm_pmu, cpu,
> metadata_etmv4_ro
> [CS_ETMV4_TRCAUTHSTATUS]);
> + /*
> + * ETE uses the same registers as ETMv4 plus TRCDEVARCH. It's also backwards
> + * compatible, so don't change the magic number otherwise that will reduce the
> + * number of versions of perf that can open it. Just append TRCDEVARCH to the end of
> + * the register block and allow newer versions of perf to make use. cs_etm_get_ro()
> + * returns 0 if it couldn't be read.
> + */
ETE is a superset of ETMv4, but an old perf that only knows ETMv4
cannot be guaranteed to decode all ETE due to new packet types.
Therefore do we want to allow old perfs to decode only some ETE,
possibly with errors?
I think it would be better to add in a new magic number for the new
decoder rather than have some grey overlap area were an "older" perf
might work intermittently dependent on the packets generated in a
particular trace run.
Regards
Mike
> + info->priv[*offset + CS_ETE_TRCDEVARCH] =
> + cs_etm_get_ro(cs_etm_pmu, cpu,
> + metadata_etmv4_ro[CS_ETE_TRCDEVARCH]);
>
> /* How much space was used */
> increment = CS_ETMV4_PRIV_MAX;
> diff --git a/tools/perf/util/cs-etm.c b/tools/perf/util/cs-etm.c
> index 62769a84a53f..68978f6707a8 100644
> --- a/tools/perf/util/cs-etm.c
> +++ b/tools/perf/util/cs-etm.c
> @@ -2508,6 +2508,7 @@ static const char * const cs_etmv4_priv_fmts[] = {
> [CS_ETMV4_TRCIDR2] = " TRCIDR2 %llx\n",
> [CS_ETMV4_TRCIDR8] = " TRCIDR8 %llx\n",
> [CS_ETMV4_TRCAUTHSTATUS] = " TRCAUTHSTATUS %llx\n",
> + [CS_ETE_TRCDEVARCH] = " TRCDEVARCH %llx\n"
> };
>
> static const char * const param_unk_fmt =
> diff --git a/tools/perf/util/cs-etm.h b/tools/perf/util/cs-etm.h
> index d65c7b19407d..52d82dce9d59 100644
> --- a/tools/perf/util/cs-etm.h
> +++ b/tools/perf/util/cs-etm.h
> @@ -59,7 +59,7 @@ enum {
> /* define fixed version 0 length - allow new format reader to read old files. */
> #define CS_ETM_NR_TRC_PARAMS_V0 (CS_ETM_ETMIDR - CS_ETM_ETMCR + 1)
>
> -/* ETMv4 metadata */
> +/* ETMv4 + ETE metadata */
> enum {
> /* Dynamic, configurable parameters */
> CS_ETMV4_TRCCONFIGR = CS_ETM_COMMON_BLK_MAX_V1,
> @@ -70,7 +70,8 @@ enum {
> CS_ETMV4_TRCIDR2,
> CS_ETMV4_TRCIDR8,
> CS_ETMV4_TRCAUTHSTATUS,
> - CS_ETMV4_PRIV_MAX,
> + CS_ETE_TRCDEVARCH,
> + CS_ETMV4_PRIV_MAX
> };
>
> /* define fixed version 0 length - allow new format reader to read old files. */
> --
> 2.28.0
>
--
Mike Leach
Principal Engineer, ARM Ltd.
Manchester Design Centre. UK
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