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Date:   Wed, 21 Jul 2021 20:20:53 -0700
From:   Moritz Fischer <mdf@...nel.org>
To:     Tom Rix <trix@...hat.com>
Cc:     Lizhi Hou <lizhi.hou@...inx.com>, linux-kernel@...r.kernel.org,
        "mdf@...nel.org" <mdf@...nel.org>, linux-fpga@...r.kernel.org,
        maxz@...inx.com, sonal.santan@...inx.com, yliu@...inx.com,
        michal.simek@...inx.com, stefanos@...inx.com,
        devicetree@...r.kernel.org, robh@...nel.org
Subject: Re: [PATCH V8 XRT Alveo 00/14] XRT Alveo driver overview

Hi all,

On Tue, Jul 20, 2021 at 12:01:34PM -0700, Tom Rix wrote:
> 
> On 7/19/21 2:26 PM, Lizhi Hou wrote:
> > Hello,
> > 
> > This is V8 of patch series which adds management physical function driver
> > for Xilinx Alveo PCIe accelerator cards.
> >      https://www.xilinx.com/products/boards-and-kits/alveo.html
> > 
> > This driver is part of Xilinx Runtime (XRT) open source stack.
> > 
> > XILINX ALVEO PLATFORM ARCHITECTURE
> > 
> > Alveo PCIe FPGA based platforms have a static *shell* partition and a
> > partial re-configurable *user* partition. The shell partition is
> > automatically loaded from flash when host is booted and PCIe is enumerated
> > by BIOS. Shell cannot be changed till the next cold reboot. The shell
> > exposes two PCIe physical functions:
> > 
> > 1. management physical function
> > 2. user physical function
> > 
> > The patch series includes Documentation/xrt.rst which describes Alveo
> > platform, XRT driver architecture and deployment model in more detail.
> > 
> > Users compile their high level design in C/C++/OpenCL or RTL into FPGA
> > image using Vitis tools.
> >      https://www.xilinx.com/products/design-tools/vitis/vitis-platform.html
> > 
> > The compiled image is packaged as xclbin which contains partial bitstream
> > for the user partition and necessary metadata. Users can dynamically swap
> > the image running on the user partition in order to switch between
> > different workloads by loading different xclbins.
> > 
> > XRT DRIVERS FOR XILINX ALVEO
> > 
> > XRT Linux kernel driver *xrt-mgmt* binds to management physical function of
> > Alveo platform. The modular driver framework is organized into several
> > platform drivers which primarily handle the following functionality:
> > 
> > 1.  Loading firmware container also called xsabin at driver attach time
> > 2.  Loading of user compiled xclbin with FPGA Manager integration
> > 3.  Clock scaling of image running on user partition
> > 4.  In-band sensors: temp, voltage, power, etc.
> > 5.  Device reset and rescan
> > 
> > The platform drivers are packaged into *xrt-lib* helper module with well
> > defined interfaces. The module provides a pseudo-bus implementation for the
> > platform drivers. More details on the driver model can be found in
> > Documentation/xrt.rst.
> > 
> > User physical function driver is not included in this patch series.
> > 
> > LIBFDT REQUIREMENT
> > 
> > XRT driver infrastructure uses Device Tree as a metadata format to discover
> > HW subsystems in the Alveo PCIe device. The Device Tree schema used by XRT
> > is documented in Documentation/xrt.rst.
> > 
> > TESTING AND VALIDATION
> > 
> > xrt-mgmt driver can be tested with full XRT open source stack which
> > includes user space libraries, board utilities and (out of tree) first
> > generation user physical function driver xocl. XRT open source runtime
> > stack is available at https://github.com/Xilinx/XRT
> > 
> > Complete documentation for XRT open source stack including sections on
> > Alveo/XRT security and platform architecture can be found here:
> > 
> > https://xilinx.github.io/XRT/master/html/index.html
> > https://xilinx.github.io/XRT/master/html/security.html
> > https://xilinx.github.io/XRT/master/html/platforms_partitions.html
> > 
> > Changes since v7:
> > - Followed review comment to remove non fpga subdevices:
> >     clock, clkfrq, ucs, ddr_calibaration, devctl and vsec
> > - Collapsed include/uapi/linux/xrt/*.h into include/uapi/linux/fpga-xrt.h
> > - Cleaned up comments in fpga-xrt.h
> > - Fixed spelling errors in xrt.rst
> 
> Lizhi,
> 
> Thanks, the changes look good.
> 
> Moritz,
> 
> I have no outstanding issues and I do not believe there are any from anyone
> else.
> 
> Can this set be included in fpga-next ?

I'll get to it this weekend, apologies for the delay guys.

- Moritz

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