lists.openwall.net   lists  /  announce  owl-users  owl-dev  john-users  john-dev  passwdqc-users  yescrypt  popa3d-users  /  oss-security  kernel-hardening  musl  sabotage  tlsify  passwords  /  crypt-dev  xvendor  /  Bugtraq  Full-Disclosure  linux-kernel  linux-netdev  linux-ext4  linux-hardening  PHC 
Open Source and information security mailing list archives
 
Hash Suite: Windows password security audit tool. GUI, reports in PDF.
[<prev] [next>] [<thread-prev] [thread-next>] [day] [month] [year] [list]
Date:   Thu, 22 Jul 2021 16:45:47 -0500
From:   Bjorn Helgaas <helgaas@...nel.org>
To:     Thomas Gleixner <tglx@...utronix.de>
Cc:     LKML <linux-kernel@...r.kernel.org>,
        Alex Williamson <alex.williamson@...hat.com>,
        "Raj, Ashok" <ashok.raj@...el.com>,
        Bjorn Helgaas <bhelgaas@...gle.com>, linux-pci@...r.kernel.org,
        "David S. Miller" <davem@...emloft.net>,
        Kevin Tian <kevin.tian@...el.com>,
        Marc Zyngier <maz@...nel.org>, Ingo Molnar <mingo@...nel.org>,
        x86@...nel.org
Subject: Re: [patch 2/8] PCI/MSI: Mask all unused MSI-X entries

On Wed, Jul 21, 2021 at 09:11:28PM +0200, Thomas Gleixner wrote:
> When MSI-X is enabled the ordering of calls is:
> 
>   msix_map_region();
>   msix_setup_entries();
>   pci_msi_setup_msi_irqs();
>   msix_program_entries();
> 
> This has a few interesting issues:
> 
>  1) msix_setup_entries() allocates the msi descriptors and initializes them

s/msi/MSI/ (one or two more below)

>     except for the msi_desc:masked member which is left zero initialized.
> 
>  2) pci_msi_setup_msi_irqs() allocates the interrupt descriptors and sets
>     up the MSI interrupts which ends up in pci_write_msi_msg() unless the
>     interrupt chip provides it's own irq_write_msi_msg() function.

s/it's/its/

>  3) msix_program_entries() does not do what the name suggests. It solely
>     updates the entries array (if not NULL) and initializes the masked
>     member for each msi descriptor by reading the hardware state and then
>     masks the entry.

Powered by blists - more mailing lists