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Message-Id: <20210722155625.056000572@linuxfoundation.org>
Date: Thu, 22 Jul 2021 18:30:02 +0200
From: Greg Kroah-Hartman <gregkh@...uxfoundation.org>
To: linux-kernel@...r.kernel.org
Cc: Greg Kroah-Hartman <gregkh@...uxfoundation.org>,
stable@...r.kernel.org, Elaine Zhang <zhangqing@...k-chips.com>,
Enric Balletbo i Serra <enric.balletbo@...labora.com>,
Johan Jonker <jbx6244@...il.com>,
Heiko Stuebner <heiko@...ech.de>,
Sasha Levin <sashal@...nel.org>
Subject: [PATCH 5.10 011/125] arm64: dts: rockchip: Fix power-controller node names for px30
From: Elaine Zhang <zhangqing@...k-chips.com>
[ Upstream commit d5de0d688ac6e0202674577b05d0726b8a6af401 ]
Use more generic names (as recommended in the device tree specification
or the binding documentation)
Signed-off-by: Elaine Zhang <zhangqing@...k-chips.com>
Reviewed-by: Enric Balletbo i Serra <enric.balletbo@...labora.com>
Signed-off-by: Johan Jonker <jbx6244@...il.com>
Link: https://lore.kernel.org/r/20210417112952.8516-6-jbx6244@gmail.com
Signed-off-by: Heiko Stuebner <heiko@...ech.de>
Signed-off-by: Sasha Levin <sashal@...nel.org>
---
arch/arm64/boot/dts/rockchip/px30.dtsi | 16 ++++++++--------
1 file changed, 8 insertions(+), 8 deletions(-)
diff --git a/arch/arm64/boot/dts/rockchip/px30.dtsi b/arch/arm64/boot/dts/rockchip/px30.dtsi
index 64193292d26c..0d6761074b11 100644
--- a/arch/arm64/boot/dts/rockchip/px30.dtsi
+++ b/arch/arm64/boot/dts/rockchip/px30.dtsi
@@ -244,20 +244,20 @@
#size-cells = <0>;
/* These power domains are grouped by VD_LOGIC */
- pd_usb@...0_PD_USB {
+ power-domain@...0_PD_USB {
reg = <PX30_PD_USB>;
clocks = <&cru HCLK_HOST>,
<&cru HCLK_OTG>,
<&cru SCLK_OTG_ADP>;
pm_qos = <&qos_usb_host>, <&qos_usb_otg>;
};
- pd_sdcard@...0_PD_SDCARD {
+ power-domain@...0_PD_SDCARD {
reg = <PX30_PD_SDCARD>;
clocks = <&cru HCLK_SDMMC>,
<&cru SCLK_SDMMC>;
pm_qos = <&qos_sdmmc>;
};
- pd_gmac@...0_PD_GMAC {
+ power-domain@...0_PD_GMAC {
reg = <PX30_PD_GMAC>;
clocks = <&cru ACLK_GMAC>,
<&cru PCLK_GMAC>,
@@ -265,7 +265,7 @@
<&cru SCLK_GMAC_RX_TX>;
pm_qos = <&qos_gmac>;
};
- pd_mmc_nand@...0_PD_MMC_NAND {
+ power-domain@...0_PD_MMC_NAND {
reg = <PX30_PD_MMC_NAND>;
clocks = <&cru HCLK_NANDC>,
<&cru HCLK_EMMC>,
@@ -278,14 +278,14 @@
pm_qos = <&qos_emmc>, <&qos_nand>,
<&qos_sdio>, <&qos_sfc>;
};
- pd_vpu@...0_PD_VPU {
+ power-domain@...0_PD_VPU {
reg = <PX30_PD_VPU>;
clocks = <&cru ACLK_VPU>,
<&cru HCLK_VPU>,
<&cru SCLK_CORE_VPU>;
pm_qos = <&qos_vpu>, <&qos_vpu_r128>;
};
- pd_vo@...0_PD_VO {
+ power-domain@...0_PD_VO {
reg = <PX30_PD_VO>;
clocks = <&cru ACLK_RGA>,
<&cru ACLK_VOPB>,
@@ -301,7 +301,7 @@
pm_qos = <&qos_rga_rd>, <&qos_rga_wr>,
<&qos_vop_m0>, <&qos_vop_m1>;
};
- pd_vi@...0_PD_VI {
+ power-domain@...0_PD_VI {
reg = <PX30_PD_VI>;
clocks = <&cru ACLK_CIF>,
<&cru ACLK_ISP>,
@@ -312,7 +312,7 @@
<&qos_isp_wr>, <&qos_isp_m1>,
<&qos_vip>;
};
- pd_gpu@...0_PD_GPU {
+ power-domain@...0_PD_GPU {
reg = <PX30_PD_GPU>;
clocks = <&cru SCLK_GPU>;
pm_qos = <&qos_gpu>;
--
2.30.2
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