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Message-ID: <c49b7e74-5b34-745c-a3dc-55bb2e83474a@amd.com>
Date:   Fri, 23 Jul 2021 15:16:14 -0500
From:   Kim Phillips <kim.phillips@....com>
To:     Like Xu <like.xu.linux@...il.com>,
        Peter Zijlstra <peterz@...radead.org>,
        Thomas Gleixner <tglx@...utronix.de>
Cc:     Ingo Molnar <mingo@...hat.com>,
        Arnaldo Carvalho de Melo <acme@...nel.org>,
        Mark Rutland <mark.rutland@....com>,
        Alexander Shishkin <alexander.shishkin@...ux.intel.com>,
        Jiri Olsa <jolsa@...hat.com>,
        Namhyung Kim <namhyung@...nel.org>,
        Borislav Petkov <bp@...en8.de>, x86@...nel.org,
        "H . Peter Anvin" <hpa@...or.com>,
        linux-perf-users@...r.kernel.org, linux-kernel@...r.kernel.org,
        Robert Richter <rrichter@....com>,
        Tom Lendacky <thomas.lendacky@....com>
Subject: Re: [RESEND PATCH] perf/x86/amd: Do not touch the
 AMD64_EVENTSEL_HOSTONLY bit inside the guest

+Tom L., Robert R.

On 7/20/21 6:26 AM, Like Xu wrote:
> From: Like Xu <likexu@...cent.com>
> 
> If we use "perf record" in an AMD Milan guest, dmesg reports a #GP
> warning from an unchecked MSR access error on MSR_F15H_PERF_CTLx:
> 
> [] unchecked MSR access error: WRMSR to 0xc0010200 (tried to write
> 0x0000020000110076) at rIP: 0xffffffff8106ddb4 (native_write_msr+0x4/0x20)
> [] Call Trace:
> []  amd_pmu_disable_event+0x22/0x90
> []  x86_pmu_stop+0x4c/0xa0
> []  x86_pmu_del+0x3a/0x140
> 
> The AMD64_EVENTSEL_HOSTONLY bit is defined and used on the host,
> while the guest perf driver should avoid such use.
> 
> Signed-off-by: Like Xu <likexu@...cent.com>
> ---

Tested-by: Kim Phillips <kim.phillips@....com>

If we were to add a Fixes: tag, would this be the right commit?:

commit 1018faa6cf23b256bf25919ef203cd7c129f06f2

Author: Joerg Roedel <joerg.roedel@....com>

Date:   Wed Feb 29 14:57:32 2012 +0100



     perf/x86/kvm: Fix Host-Only/Guest-Only counting with SVM disabled


Thanks,

Kim

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