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Message-ID: <b2d74079-4858-1a2d-55b0-9504ebabc5e3@xs4all.nl>
Date:   Fri, 23 Jul 2021 10:24:54 +0200
From:   Hans Verkuil <hverkuil@...all.nl>
To:     Krzysztof Hałasa <khalasa@...p.pl>
Cc:     Mauro Carvalho Chehab <mchehab@...nel.org>,
        linux-media@...r.kernel.org, lkml <linux-kernel@...r.kernel.org>
Subject: Re: [PATCH REPOST] TDA1997x: replace video detection routine

Hi Krzysztof,

On 22/07/2021 08:43, Krzysztof Hałasa wrote:
> Also, I have spotted an interesting loop condition in
> drivers/media/v4l2-core/v4l2-dv-timings.c (dated 2013,
> d1c65ad6a44b0ff79d2f0bf726fa6fd9248991f4).
> It obviously works (unless the table grows to 600+ entries), but I guess
> I should make it "standard", shouldn't I?

Thanks for catching this!

I've posted a patch fixing it. Luckily it never broke anything, but it definitely
had to be fixed.

Regards,

	Hans

> 
> The first case is pretty normal:
> @@ -159,10 +161,10 @@ int v4l2_enum_dv_timings_cap(struct v4l2_enum_dv_timings *t,
>      u32 i, idx;
>  
>      memset(t->reserved, 0, sizeof(t->reserved));
> -    for (i = idx = 0; i < ARRAY_SIZE(timings); i++) {
> -        if (v4l2_dv_valid_timings(timings + i, cap) &&
> +    for (i = idx = 0; v4l2_dv_timings_presets[i].bt.width; i++) {
> +        if (v4l2_dv_valid_timings(v4l2_dv_timings_presets + i, cap) &&
>              idx++ == t->index) {
> -            t->timings = timings[i];
> +            t->timings = v4l2_dv_timings_presets[i];
>              return 0;
>          }
>      }
> 
> This is the interesting part:
> @@ -179,10 +181,10 @@ bool v4l2_find_dv_timings_cap(struct v4l2_dv_timings *t,
>      if (!v4l2_dv_valid_timings(t, cap))
>          return false;
>  
> -    for (i = 0; i < ARRAY_SIZE(timings); i++) {
> -        if (v4l2_dv_valid_timings(timings + i, cap) &&
> -            v4l2_match_dv_timings(t, timings + i, pclock_delta)) {
> -            *t = timings[i];
> +    for (i = 0; i < v4l2_dv_timings_presets[i].bt.width; i++) {
>                  ^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^
> +        if (v4l2_dv_valid_timings(v4l2_dv_timings_presets + i, cap) &&
> +            v4l2_match_dv_timings(t, v4l2_dv_timings_presets + i, pclock_delta)) {
> +            *t = v4l2_dv_timings_presets[i];
>              return true;
>          }
>      }
> 

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