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Message-ID: <20210723083702.nvhurkgbzbvrrmv3@pali>
Date:   Fri, 23 Jul 2021 10:37:02 +0200
From:   Pali Rohár <pali@...nel.org>
To:     Kunihiko Hayashi <hayashi.kunihiko@...ionext.com>
Cc:     Lorenzo Pieralisi <lorenzo.pieralisi@....com>,
        Bjorn Helgaas <helgaas@...nel.org>,
        Bjorn Helgaas <bhelgaas@...gle.com>,
        Rob Herring <robh@...nel.org>,
        Jingoo Han <jingoohan1@...il.com>,
        Gustavo Pimentel <gustavo.pimentel@...opsys.com>,
        Marc Zyngier <maz@...nel.org>, linux-pci@...r.kernel.org,
        linux-kernel@...r.kernel.org,
        Jassi Brar <jaswinder.singh@...aro.org>,
        Masami Hiramatsu <masami.hiramatsu@...aro.org>,
        linux-arm-kernel@...ts.infradead.org
Subject: Re: [PATCH v8 3/3] PCI: uniphier: Add misc interrupt handler to
 invoke PME and AER

On Friday 23 July 2021 15:59:12 Kunihiko Hayashi wrote:
> Hi Pali,
> 
> On 2021/07/23 2:26, Pali Rohár wrote:
> > On Friday 23 July 2021 01:54:10 Kunihiko Hayashi wrote:
> > > On 2021/07/18 9:51, Pali Rohar wrote:
> > > > > > IMO this should be modelled with a separate IRQ domain and chip for
> > > > > > the root port (yes this implies describing the root port in the dts
> > > > > > file with a separate msi-parent).
> > > > > > 
> > > > > > This series as it stands is a kludge.
> > > > > 
> > > > > I see. However I need some time to consider the way to separate IRQ domain.
> > > > > Is there any idea or example to handle PME/AER with IRQ domain?
> > > > 
> > > > Seems that you are dealing with very similar issues as me with aardvark
> > > > driver.
> > > > 
> > > > As an inspiration look at my aardvark patch which setup separate IRQ
> > > > domain for PME, AER and HP interrupts:
> > > > https://lore.kernel.org/linux-pci/20210506153153.30454-32-pali@kernel.org/
> > > > 
> > > > Thanks to custom driver map_irq function, it is not needed to describe
> > > > root port with separate msi-parent in DTS.
> > > 
> > > I need to understand your solution, though, this might be the same situation as my driver.
> > 
> > I think it is very very similar as aardvark also returns zero as hw irq
> > number (and it is not possible to change it).
> > 
> > So simple solution for you is also to register separate IRQ domain for
> > Root Port Bridge and then re-trigger interrupt with number 0 (which you
> > wrote that is default) as:
> > 
> >      virq = irq_find_mapping(priv->irq_domain, 0);
> >      generic_handle_irq(virq);
> > 
> > in your uniphier_pcie_misc_isr() function.
> 
> I'm not sure "register separate IRQ domain for Root Port Bridge".
> Do you mean that your suggestion is to create new IRQ domain, and add this domain to root port?

Yes.

> Or could you show me something example?

I have already sent link to patch above which it implements for
pci-aardvark.c driver.

https://lore.kernel.org/linux-pci/20210506153153.30454-32-pali@kernel.org/

In device prove callback register domain by irq_domain_add_linear().
In bridge map_irq() callback use irq_create_mapping() for Root Port
device (and otherwise default of_irq_parse_and_map_pci()). And in
uniphier_pcie_misc_isr() retrigger interrupt into new domain.

> The re-trigger part is the same method as v5 patch I wrote.

Just you need to specify that new/private IRQ domain into
irq_find_mapping() call.

> > There is no need to modify DTS. And also no need to use complicated
> > logic for finding registered virq number via pcie_port_service_get_irq()
> > and uniphier_pcie_port_get_irq() functions.
> 
> I see.
> GIC interrupt for MSI is handled by the MSI domain by pcie-designware-host.c.
> My concern is how to trigger PME/AER event with another IRQ domain.
> 
> Thank you,
> 
> ---
> Best Regards
> Kunihiko Hayashi

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