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Message-ID: <CA+V-a8t82VBJLTHx0KoShi=+ovoORg1e9wgg16UDjL1NpNtrWg@mail.gmail.com>
Date:   Mon, 26 Jul 2021 17:03:45 +0100
From:   "Lad, Prabhakar" <prabhakar.csengg@...il.com>
To:     Andy Shevchenko <andy.shevchenko@...il.com>
Cc:     Geert Uytterhoeven <geert@...ux-m68k.org>,
        Lad Prabhakar <prabhakar.mahadev-lad.rj@...renesas.com>,
        Rob Herring <robh+dt@...nel.org>,
        Linus Walleij <linus.walleij@...aro.org>,
        Magnus Damm <magnus.damm@...il.com>,
        "open list:GPIO SUBSYSTEM" <linux-gpio@...r.kernel.org>,
        "open list:OPEN FIRMWARE AND FLATTENED DEVICE TREE BINDINGS" 
        <devicetree@...r.kernel.org>,
        Linux-Renesas <linux-renesas-soc@...r.kernel.org>,
        Linux Kernel Mailing List <linux-kernel@...r.kernel.org>,
        Biju Das <biju.das.jz@...renesas.com>
Subject: Re: [PATCH v3 2/4] pinctrl: renesas: Add RZ/G2L pin and gpio
 controller driver

Hi Andy,

Thank you for the review.

On Mon, Jul 26, 2021 at 2:35 PM Andy Shevchenko
<andy.shevchenko@...il.com> wrote:
>
> On Mon, Jul 26, 2021 at 4:25 PM Geert Uytterhoeven <geert@...ux-m68k.org> wrote:
> > On Wed, Jul 21, 2021 at 9:16 PM Lad Prabhakar
> > <prabhakar.mahadev-lad.rj@...renesas.com> wrote:
>
> ...
>
> > > +#define RZG2L_GPIO_PORT_GET_PINCNT(x)  (((x) >> 28) & 0x7)
> > > +#define RZG2L_GPIO_PORT_GET_INDEX(x)   ((((x) & GENMASK(27, 20)) >> 20) & 0x7f)
>
> It's funny one of them uses style "a" (no GENMASK() use), another
> style "b" (GENMASK() is in use). I suggest being consistent: either
> drop GENMASK() everywhere, or use them in all suitable places.
>
Will use GENMASK() everywhere to be consistent.

> > > +#define RZG2L_SINGLE_PIN_GET_PORT(x)   (((x) >> 24) & 0x7f)
> > > +#define RZG2L_SINGLE_PIN_GET_BIT(x)    ((((x) & GENMASK(23, 20)) >> 20) & 0x7)
>
> Ditto.
>
As mentioned above will use GENMASK()

Cheers,
Prabhakar

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