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Message-ID: <1627459111-2907-1-git-send-email-chunfeng.yun@mediatek.com>
Date: Wed, 28 Jul 2021 15:58:23 +0800
From: Chunfeng Yun <chunfeng.yun@...iatek.com>
To: Vinod Koul <vkoul@...nel.org>, Rob Herring <robh+dt@...nel.org>,
Chun-Kuang Hu <chunkuang.hu@...nel.org>
CC: Chunfeng Yun <chunfeng.yun@...iatek.com>,
Kishon Vijay Abraham I <kishon@...com>,
Philipp Zabel <p.zabel@...gutronix.de>,
Matthias Brugger <matthias.bgg@...il.com>,
<linux-arm-kernel@...ts.infradead.org>,
<linux-mediatek@...ts.infradead.org>,
<linux-phy@...ts.infradead.org>, <devicetree@...r.kernel.org>,
<linux-kernel@...r.kernel.org>, <dri-devel@...ts.freedesktop.org>,
Eddie Hung <eddie.hung@...iatek.com>
Subject: [PATCH 1/9] dt-bindings: phy: mediatek: tphy: support type switch by pericfg
Add support type switch by pericfg register between USB3, PCIe,
SATA, SGMII, this is used to replace the way through efuse or
jumper.
Signed-off-by: Chunfeng Yun <chunfeng.yun@...iatek.com>
---
.../devicetree/bindings/phy/mediatek,tphy.yaml | 16 ++++++++++++++++
1 file changed, 16 insertions(+)
diff --git a/Documentation/devicetree/bindings/phy/mediatek,tphy.yaml b/Documentation/devicetree/bindings/phy/mediatek,tphy.yaml
index 838852cb8527..9e6c0f43f1c6 100644
--- a/Documentation/devicetree/bindings/phy/mediatek,tphy.yaml
+++ b/Documentation/devicetree/bindings/phy/mediatek,tphy.yaml
@@ -201,6 +201,22 @@ patternProperties:
Specify the flag to enable BC1.2 if support it
type: boolean
+ mediatek,syscon-type:
+ $ref: /schemas/types.yaml#/definitions/phandle-array
+ maxItems: 1
+ description:
+ A phandle to syscon used to access the register of type switch,
+ the field should always be 3 cells long.
+ items:
+ items:
+ - description:
+ The first cell represents a phandle to syscon
+ - description:
+ The second cell represents the register offset
+ - description:
+ The third cell represents the index of config segment
+ enum: [0, 1, 2, 3]
+
required:
- reg
- "#phy-cells"
--
2.18.0
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