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Message-Id: <20210728135534.703028-3-pgwipeout@gmail.com>
Date: Wed, 28 Jul 2021 09:55:27 -0400
From: Peter Geis <pgwipeout@...il.com>
To: Linus Walleij <linus.walleij@...aro.org>,
Bartosz Golaszewski <bgolaszewski@...libre.com>,
Rob Herring <robh+dt@...nel.org>,
Heiko Stuebner <heiko@...ech.de>
Cc: linux-gpio@...r.kernel.org, devicetree@...r.kernel.org,
linux-arm-kernel@...ts.infradead.org,
linux-rockchip@...ts.infradead.org, linux-kernel@...r.kernel.org,
Peter Geis <pgwipeout@...il.com>
Subject: [PATCH 2/9] arm64: dts: rockchip: fix rk3568 mbi-alias
The mbi-alias incorrectly points to 0xfd100000 when it should point to
0xfd410000.
This fixes MSIs on rk3568.
Fixes: a3adc0b9071d ("arm64: dts: rockchip: add core dtsi for RK3568
SoC")
Signed-off-by: Peter Geis <pgwipeout@...il.com>
---
arch/arm64/boot/dts/rockchip/rk356x.dtsi | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/arch/arm64/boot/dts/rockchip/rk356x.dtsi b/arch/arm64/boot/dts/rockchip/rk356x.dtsi
index 322971318d5a..f7ecdfd66f86 100644
--- a/arch/arm64/boot/dts/rockchip/rk356x.dtsi
+++ b/arch/arm64/boot/dts/rockchip/rk356x.dtsi
@@ -195,7 +195,7 @@ gic: interrupt-controller@...00000 {
interrupts = <GIC_PPI 9 IRQ_TYPE_LEVEL_HIGH>;
interrupt-controller;
#interrupt-cells = <3>;
- mbi-alias = <0x0 0xfd100000>;
+ mbi-alias = <0x0 0xfd410000>;
mbi-ranges = <296 24>;
msi-controller;
};
--
2.25.1
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