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Message-ID: <CAGXv+5EagmhYYpri+nzo6WgGz8A=oiU3Vy+2AVjho=eo6Z+DLw@mail.gmail.com>
Date: Thu, 29 Jul 2021 17:43:30 +0800
From: Chen-Yu Tsai <wenst@...omium.org>
To: "zhiyong.tao" <zhiyong.tao@...iatek.com>
Cc: Rob Herring <robh+dt@...nel.org>,
Linus Walleij <linus.walleij@...aro.org>, mark.rutland@....com,
Matthias Brugger <matthias.bgg@...il.com>,
Sean Wang <sean.wang@...nel.org>,
srv_heupstream <srv_heupstream@...iatek.com>,
hui.liu@...iatek.com, Eddie Huang <eddie.huang@...iatek.com>,
light.hsieh@...iatek.com, biao.huang@...iatek.com,
hongzhou.yang@...iatek.com, Sean Wang <sean.wang@...iatek.com>,
Seiya Wang <seiya.wang@...iatek.com>,
Devicetree List <devicetree@...r.kernel.org>,
LKML <linux-kernel@...r.kernel.org>,
"moderated list:ARM/FREESCALE IMX / MXC ARM ARCHITECTURE"
<linux-arm-kernel@...ts.infradead.org>,
"moderated list:ARM/Mediatek SoC support"
<linux-mediatek@...ts.infradead.org>, linux-gpio@...r.kernel.org
Subject: Re: [PATCH v10 1/2] dt-bindings: pinctrl: mt8195: add rsel define
On Thu, Jul 29, 2021 at 4:23 PM zhiyong.tao <zhiyong.tao@...iatek.com> wrote:
>
> On Mon, 2021-07-26 at 16:02 +0800, Chen-Yu Tsai wrote:
> > On Thu, Jul 22, 2021 at 3:54 PM zhiyong tao <zhiyong.tao@...iatek.com
> > > wrote:
> > >
> > > On Tue, 2021-07-13 at 15:17 +0800, Chen-Yu Tsai wrote:
> > > > Hi,
> > > >
> > > > On Sat, Jul 10, 2021 at 4:17 PM Zhiyong Tao <
> > > > zhiyong.tao@...iatek.com> wrote:
> > > > >
> > > > > This patch adds rsel define for mt8195.
> > > > >
> > > > > Signed-off-by: Zhiyong Tao <zhiyong.tao@...iatek.com>
> > > > > ---
> > > > > include/dt-bindings/pinctrl/mt65xx.h | 9 +++++++++
> > > > > 1 file changed, 9 insertions(+)
> > > > >
> > > > > diff --git a/include/dt-bindings/pinctrl/mt65xx.h b/include/dt-
> > > > > bindings/pinctrl/mt65xx.h
> > > > > index 7e16e58fe1f7..f5934abcd1bd 100644
> > > > > --- a/include/dt-bindings/pinctrl/mt65xx.h
> > > > > +++ b/include/dt-bindings/pinctrl/mt65xx.h
> > > > > @@ -16,6 +16,15 @@
> > > > > #define MTK_PUPD_SET_R1R0_10 102
> > > > > #define MTK_PUPD_SET_R1R0_11 103
> > > > >
> > > > > +#define MTK_PULL_SET_RSEL_000 200
> > > > > +#define MTK_PULL_SET_RSEL_001 201
> > > > > +#define MTK_PULL_SET_RSEL_010 202
> > > > > +#define MTK_PULL_SET_RSEL_011 203
> > > > > +#define MTK_PULL_SET_RSEL_100 204
> > > > > +#define MTK_PULL_SET_RSEL_101 205
> > > > > +#define MTK_PULL_SET_RSEL_110 206
> > > > > +#define MTK_PULL_SET_RSEL_111 207
> > > > > +
> > > >
> > > > Instead of all the obscure macros and the new custom "rsel"
> > > > property,
> > > > which BTW is not in the bindings, can't we just list the actual
> > > > bias
> > > > resistance of each setting? We could also migrate away from R1R0.
> > > >
> > >
> > > ==>Hi Chenyu,
> > > The rsel actual bias resistance of each setting:
> > >
> > > MTK_PULL_SET_RSEL_000:75K in PU, 75k in PD;
> > > MTK_PULL_SET_RSEL_001:10k in PU, 5k in PD;
> > > MTK_PULL_SET_RSEL_010:5k in PU, 75k in PD;
> > > MTK_PULL_SET_RSEL_011:4k in PU, 5K in PD;
> > > MTK_PULL_SET_RSEL_100:3k in PU, 75k in PD;
> > > MTK_PULL_SET_RSEL_101:2k in PU, 5K in PD;
> > > MTK_PULL_SET_RSEL_110:1.5k in PU, 75k in PD;
> > > MTK_PULL_SET_RSEL_111:1k in PU, 5k in PD.
> > >
> > > The rsel actual bias resistance is different between PU and PD.
> >
> > Thanks. Somehow I missed this when looking through the datasheet.
> > This
> > encoding is interesting. Since it doesn't make sense to have both
> > pull-up and pull-down, even though the hardware seems capable of
> > doing
> > so, I suppose the intent is to support 75k or 5k for pull-down, and
> > (75k, 10k, 5k, 4k, 3k, 2k, 1.5k, 1k) for pull-up?
> >
> > We could add these values to the binding so we could check for
> > misuse.
> >
> > The range of values seems to also cover those supported by the
> > alternative R0/R1 settings. The values for kprow[01] and kpcol[01]
> > seem to be different though.
> >
> > We should get rid of the MTK_PUPD_SET_R1R0_* macros at the same time.
> > They seem to be some magic values used with bias-pull-*, which is not
> > how the properties should be used. At the same time, they overlap
> > with
> > mediatek,pull-* properties.
> >
> > It would be great if we could standardize on the generic pinconf
> > properties, and also use real values that fit the requirements of the
> > properties, i.e. using real resistance values. I'm not sure if it
> > would make sense to enumerate which pins support which configurations
> > though.
> >
> >
> > Thanks
> > ChenYu
> >
> >
> The rsel actual bias resistance of each setting is different in
> different IC. we think that the define "MTK_PULL_SET_RSEL_000" is more
> common for all different IC.
I see. I personally prefer having things clearly described. I can
understand this might be an extra burden to support different chips
with different parameters, though this should be fairly straightforward
with lookup tables tied to the compatible strings.
Let's see if Rob and Linus have anything to add.
ChenYu
> Thanks.
>
> > > > Then we can specify the setting with the standard bias-pull-
> > > > up/down
> > > > properties [1].
> > > >
> > > > Also, please ask internally if Mediatek could relicense all the
> > > > header
> > > > files that Mediatek has contributed under include/dt-
> > > > bindings/pinctrl/ [2]
> > > > to GPL-2.0 and BSD dual license. These files are part of the DT
> > > > bindings
> > > > and we really want them to be dual licensed as well, and not just
> > > > the
> > > > YAML files.
> > > >
> > >
> > > ==> We will confirm it internally and reply it later.
> > >
> > > Thanks.
> > > >
> > > > Regards
> > > > ChenYu
> > > >
> > > >
> > > > [1]
> > > > https://elixir.bootlin.com/linux/latest/source/Documentation/devicetree/bindings/pinctrl/pincfg-node.yaml#L37
> > > > [2] Note that a few files were contributed by other people
> > > >
> > > > > #define MTK_DRIVE_2mA 2
> > > > > #define MTK_DRIVE_4mA 4
> > > > > #define MTK_DRIVE_6mA 6
> > > > > --
> > > > > 2.18.0
> > > > > _______________________________________________
> > > > > Linux-mediatek mailing list
> > > > > Linux-mediatek@...ts.infradead.org
> > > > > http://lists.infradead.org/mailman/listinfo/linux-mediatek
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