lists.openwall.net   lists  /  announce  owl-users  owl-dev  john-users  john-dev  passwdqc-users  yescrypt  popa3d-users  /  oss-security  kernel-hardening  musl  sabotage  tlsify  passwords  /  crypt-dev  xvendor  /  Bugtraq  Full-Disclosure  linux-kernel  linux-netdev  linux-ext4  linux-hardening  linux-cve-announce  PHC 
Open Source and information security mailing list archives
 
Hash Suite: Windows password security audit tool. GUI, reports in PDF.
[<prev] [next>] [<thread-prev] [thread-next>] [day] [month] [year] [list]
Message-ID: <61036EEC.4020006@huawei.com>
Date:   Fri, 30 Jul 2021 11:15:56 +0800
From:   Liuxiangdong <liuxiangdong5@...wei.com>
To:     <like.xu.linux@...il.com>, <alex.shi@...ux.alibaba.com>,
        <like.xu.linux@...il.com>
CC:     <ak@...ux.intel.com>, <jmattson@...gle.com>, <joro@...tes.org>,
        <kan.liang@...el.com>, <kvm@...r.kernel.org>,
        <linux-kernel@...r.kernel.org>, <pbonzini@...hat.com>,
        <seanjc@...gle.com>, <vkuznets@...hat.com>,
        <wanpengli@...cent.com>, <wei.w.wang@...el.com>, <x86@...nel.org>,
        "Fangyi (Eric)" <eric.fangyi@...wei.com>,
        Xiexiangyou <xiexiangyou@...wei.com>
Subject: Re: [PATCH v14 00/11] KVM: x86/pmu: Guest Last Branch Recording
 Enabling

Hi, like.

Does it have requirement on CPU if we want to use LBR in Guest?

I have tried linux-5.14-rc3 on different CPUs. And I can use lbr on 
Haswell, Broadwell, skylake and icelake, but I cannot use lbr on IvyBridge.

Thanks!


On 2021/7/29 20:40, Liuxiangdong wrote:
> Hi, like.
>
> This patch set has been merged in 5.12 kernel tree so we can use LBR 
> in Guest.
> Does it have requirement on CPU?
> I can use lbr in guest on skylake and icelake, but cannot on IvyBridge.
>
> I can see lbr formats(000011b) in perf_capabilities msr(0x345), but 
> there is still
> error when I try.
>
> $ perf record -b
> Error:
> cycles: PMU Hardware doesn't support sampling/overflow-interrupts. Try 
> 'perf stat'
>
> Host CPU:
> Architecture:                    x86_64
> CPU op-mode(s):                  32-bit, 64-bit
> Byte Order:                      Little Endian
> Address sizes:                   46 bits physical, 48 bits virtual
> CPU(s):                          24
> On-line CPU(s) list:             0-23
> Thread(s) per core:              2
> Core(s) per socket:              6
> Socket(s):                       2
> NUMA node(s):                    2
> Vendor ID:                       GenuineIntel
> CPU family:                      6
> Model:                           62
> Model name:                      Intel(R) Xeon(R) CPU E5-2620 v2 @ 
> 2.10GHz
> Stepping:                        4
>
>
> Thanks!
> Xiangdong Liu

Powered by blists - more mailing lists

Powered by Openwall GNU/*/Linux Powered by OpenVZ