lists.openwall.net   lists  /  announce  owl-users  owl-dev  john-users  john-dev  passwdqc-users  yescrypt  popa3d-users  /  oss-security  kernel-hardening  musl  sabotage  tlsify  passwords  /  crypt-dev  xvendor  /  Bugtraq  Full-Disclosure  linux-kernel  linux-netdev  linux-ext4  linux-hardening  linux-cve-announce  PHC 
Open Source and information security mailing list archives
 
Hash Suite: Windows password security audit tool. GUI, reports in PDF.
[<prev] [next>] [<thread-prev] [thread-next>] [day] [month] [year] [list]
Date:   Fri, 30 Jul 2021 12:28:15 +0530
From:   Anshuman Khandual <anshuman.khandual@....com>
To:     Suzuki K Poulose <suzuki.poulose@....com>,
        coresight@...ts.linaro.org
Cc:     linux-arm-kernel@...ts.infradead.org, linux-kernel@...r.kernel.org,
        tamas.zsoldos@....com, al.grant@....com, leo.yan@...aro.org,
        mike.leach@...aro.org, mathieu.poirier@...aro.org,
        jinlmao@....qualcomm.com
Subject: Re: [PATCH v2 10/10] coresight: trbe: Prohibit trace before disabling
 TRBE



On 7/23/21 6:16 PM, Suzuki K Poulose wrote:
> We must prohibit the CPU from tracing before we disable
> the TRBE and only re-enable it when we are sure the TRBE
> has been enabled back. Otherwise, leave the CPU in
> prohibited state.
> 
> Cc: Anshuman Khandual <anshuman.khandual@....com>
> Cc: Mathieu Poirier <mathieu.poirier@...aro.org>
> Cc: Mike Leach <mike.leach@...aro.org>
> Cc: Leo Yan <leo.yan@...aro.org>
> Signed-off-by: Suzuki K Poulose <suzuki.poulose@....com>
> ---
>  .../hwtracing/coresight/coresight-self-hosted-trace.h    | 4 +++-
>  drivers/hwtracing/coresight/coresight-trbe.c             | 9 +++++++++
>  2 files changed, 12 insertions(+), 1 deletion(-)
> 
> diff --git a/drivers/hwtracing/coresight/coresight-self-hosted-trace.h b/drivers/hwtracing/coresight/coresight-self-hosted-trace.h
> index 586d26e0cba3..34372482a3cd 100644
> --- a/drivers/hwtracing/coresight/coresight-self-hosted-trace.h
> +++ b/drivers/hwtracing/coresight/coresight-self-hosted-trace.h
> @@ -22,11 +22,13 @@ static inline void write_trfcr(u64 val)
>  	isb();
>  }
>  
> -static inline void cpu_prohibit_trace(void)
> +static inline u64 cpu_prohibit_trace(void)
>  {
>  	u64 trfcr = read_trfcr();
>  
>  	/* Prohibit tracing at EL0 & the kernel EL */
>  	write_trfcr(trfcr & ~(TRFCR_ELx_ExTRE | TRFCR_ELx_E0TRE));
> +	/* Return the original value of the TRFCR */
> +	return trfcr;
>  }
>  #endif			/*  __CORESIGHT_SELF_HOSTED_TRACE_H */
> diff --git a/drivers/hwtracing/coresight/coresight-trbe.c b/drivers/hwtracing/coresight/coresight-trbe.c
> index e7567727e8fc..b8586c170889 100644
> --- a/drivers/hwtracing/coresight/coresight-trbe.c
> +++ b/drivers/hwtracing/coresight/coresight-trbe.c
> @@ -16,6 +16,7 @@
>  #define pr_fmt(fmt) DRVNAME ": " fmt
>  
>  #include <asm/barrier.h>
> +#include "coresight-self-hosted-trace.h"
>  #include "coresight-trbe.h"
>  
>  #define PERF_IDX2OFF(idx, buf) ((idx) % ((buf)->nr_pages << PAGE_SHIFT))
> @@ -764,6 +765,7 @@ static irqreturn_t arm_trbe_irq_handler(int irq, void *dev)
>  	enum trbe_fault_action act;
>  	u64 status;
>  	bool truncated = false;
> +	u64 trfcr;
>  
>  	/* Reads to TRBSR_EL1 is fine when TRBE is active */
>  	status = read_sysreg_s(SYS_TRBSR_EL1);
> @@ -774,6 +776,8 @@ static irqreturn_t arm_trbe_irq_handler(int irq, void *dev)
>  	if (!is_trbe_irq(status))
>  		return IRQ_NONE;
>  
> +	/* Prohibit the CPU from tracing before we disable the TRBE */
> +	trfcr = cpu_prohibit_trace();
>  	/*
>  	 * Ensure the trace is visible to the CPUs and
>  	 * any external aborts have been resolved.
> @@ -805,9 +809,14 @@ static irqreturn_t arm_trbe_irq_handler(int irq, void *dev)
>  	/*
>  	 * If the buffer was truncated, ensure perf callbacks
>  	 * have completed, which will disable the event.
> +	 *
> +	 * Otherwise, restore the trace filter controls to
> +	 * allow the tracing.
>  	 */
>  	if (truncated)
>  		irq_work_run();
> +	else
> +		write_trfcr(trfcr);
>  
>  	return IRQ_HANDLED;
>  }
> 

The change LGTM. But the commit message needs to add some more details
like that in V2 which explained how traces from ETE could be routed to
ATB if not put in trace prohibited state, for all exception levels etc.

Powered by blists - more mailing lists

Powered by Openwall GNU/*/Linux Powered by OpenVZ