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Message-ID: <202107302306.3u87XGWx-lkp@intel.com>
Date: Fri, 30 Jul 2021 23:24:15 +0800
From: kernel test robot <lkp@...el.com>
To: Mark Rutland <mark.rutland@....com>
Cc: kbuild-all@...ts.01.org, linux-kernel@...r.kernel.org,
Peter Zijlstra <peterz@...radead.org>
Subject: arch/riscv/include/asm/atomic.h:225 arch_atomic64_fetch_add_unless()
warn: inconsistent indenting
tree: https://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git master
head: 764a5bc89b12b82c18ce7ca5d7c1b10dd748a440
commit: bccf1ec369ac126b0997d01a6e1deae00e2cf6b3 locking/atomics: atomic-instrumented: simplify ifdeffery
date: 9 weeks ago
config: riscv-randconfig-m031-20210730 (attached as .config)
compiler: riscv64-linux-gcc (GCC) 10.3.0
If you fix the issue, kindly add following tag as appropriate
Reported-by: kernel test robot <lkp@...el.com>
smatch warnings:
arch/riscv/include/asm/atomic.h:225 arch_atomic64_fetch_add_unless() warn: inconsistent indenting
arch/riscv/include/asm/atomic.h:225 arch_atomic64_fetch_add_unless() warn: inconsistent indenting
vim +225 arch/riscv/include/asm/atomic.h
fab957c11efe2f Palmer Dabbelt 2017-07-10 218
fab957c11efe2f Palmer Dabbelt 2017-07-10 219 #ifndef CONFIG_GENERIC_ATOMIC64
9efbb355831014 Mark Rutland 2021-05-25 220 static __always_inline s64 arch_atomic64_fetch_add_unless(atomic64_t *v, s64 a, s64 u)
fab957c11efe2f Palmer Dabbelt 2017-07-10 221 {
0754211847d7a2 Mark Rutland 2019-05-22 222 s64 prev;
0754211847d7a2 Mark Rutland 2019-05-22 223 long rc;
fab957c11efe2f Palmer Dabbelt 2017-07-10 224
fab957c11efe2f Palmer Dabbelt 2017-07-10 @225 __asm__ __volatile__ (
5ce6c1f3535fa8 Andrea Parri 2018-03-09 226 "0: lr.d %[p], %[c]\n"
5ce6c1f3535fa8 Andrea Parri 2018-03-09 227 " beq %[p], %[u], 1f\n"
5ce6c1f3535fa8 Andrea Parri 2018-03-09 228 " add %[rc], %[p], %[a]\n"
5ce6c1f3535fa8 Andrea Parri 2018-03-09 229 " sc.d.rl %[rc], %[rc], %[c]\n"
5ce6c1f3535fa8 Andrea Parri 2018-03-09 230 " bnez %[rc], 0b\n"
5ce6c1f3535fa8 Andrea Parri 2018-03-09 231 " fence rw, rw\n"
5ce6c1f3535fa8 Andrea Parri 2018-03-09 232 "1:\n"
fab957c11efe2f Palmer Dabbelt 2017-07-10 233 : [p]"=&r" (prev), [rc]"=&r" (rc), [c]"+A" (v->counter)
fab957c11efe2f Palmer Dabbelt 2017-07-10 234 : [a]"r" (a), [u]"r" (u)
fab957c11efe2f Palmer Dabbelt 2017-07-10 235 : "memory");
fab957c11efe2f Palmer Dabbelt 2017-07-10 236 return prev;
fab957c11efe2f Palmer Dabbelt 2017-07-10 237 }
9efbb355831014 Mark Rutland 2021-05-25 238 #define arch_atomic64_fetch_add_unless arch_atomic64_fetch_add_unless
fab957c11efe2f Palmer Dabbelt 2017-07-10 239 #endif
fab957c11efe2f Palmer Dabbelt 2017-07-10 240
:::::: The code at line 225 was first introduced by commit
:::::: fab957c11efe2f405e08b9f0d080524bc2631428 RISC-V: Atomic and Locking Code
:::::: TO: Palmer Dabbelt <palmer@...belt.com>
:::::: CC: Palmer Dabbelt <palmer@...belt.com>
---
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