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Message-ID: <b7b6aabd-1f10-1b21-eaeb-102ead2989cd@intel.com>
Date: Fri, 30 Jul 2021 09:50:59 -0700
From: Dave Hansen <dave.hansen@...el.com>
To: Sean Christopherson <seanjc@...gle.com>,
Jarkko Sakkinen <jarkko@...nel.org>
Cc: Tony Luck <tony.luck@...el.com>, x86@...nel.org,
linux-kernel@...r.kernel.org
Subject: Re: [PATCH v3 2/7] x86/sgx: Add infrastructure to identify SGX EPC
pages
On 7/30/21 9:46 AM, Sean Christopherson wrote:
> Out of curiosity, on multi-socket systems, are EPC sections clustered in a single
> address range, or are they interleaved with regular RAM? If they're clustered,
> you could track the min/max across all sections to optimize the common case that
> an address isn't in any EPC section.
They're interleaved on the systems that I've seen:
Socket 0 - RAM
Socket 0 - EPC
Socket 1 - RAM
Socket 1 - EPC
It would probably be pretty expensive in terms of the physical address
remapping resources to cluster them.
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