| lists.openwall.net | lists / announce owl-users owl-dev john-users john-dev passwdqc-users yescrypt popa3d-users / oss-security kernel-hardening musl sabotage tlsify passwords / crypt-dev xvendor / Bugtraq Full-Disclosure linux-kernel linux-netdev linux-ext4 linux-hardening linux-cve-announce PHC | |
|
Open Source and information security mailing list archives
| ||
|
Message-Id: <fa72dfad9282e2c24b99327d08cbe032d7034bbf.1627710766.git.gayatri.kammela@intel.com>
Date: Fri, 30 Jul 2021 23:07:12 -0700
From: Gayatri Kammela <gayatri.kammela@...el.com>
To: platform-driver-x86@...r.kernel.org
Cc: mgross@...ux.intel.com, hdegoede@...hat.com,
irenic.rajneesh@...il.com, andriy.shevchenko@...ux.intel.com,
vicamo.yang@...onical.com, srinivas.pandruvada@...el.com,
david.e.box@...el.com, chao.qin@...el.com,
linux-kernel@...r.kernel.org, tamar.mashiah@...el.com,
gregkh@...uxfoundation.org, rajatja@...gle.com,
Shyam-sundar.S-k@....com, Alexander.Deucher@....com,
mlimonci@....com, Gayatri Kammela <gayatri.kammela@...el.com>,
Andy Shevchenko <andy.shevchenko@...il.com>
Subject: [PATCH v6 1/5] platform/x86/intel: intel_pmc_core: Move intel_pmc_core* files to pmc subfolder
As part of collecting Intel x86 specific drivers in their own
folder, move intel_pmc_core* files to its own subfolder there.
Cc: Chao Qin <chao.qin@...el.com>
Cc: Srinivas Pandruvada <srinivas.pandruvada@...el.com>
Cc: David Box <david.e.box@...el.com>
Cc: You-Sheng Yang <vicamo.yang@...onical.com>
Cc: Hans de Goede <hdegoede@...hat.com>
Suggested-by: Andy Shevchenko <andriy.shevchenko@...ux.intel.com>
Acked-by: Rajneesh Bhardwaj <irenic.rajneesh@...il.com>
Reviewed-by: Andy Shevchenko <andy.shevchenko@...il.com>
Signed-off-by: Gayatri Kammela <gayatri.kammela@...el.com>
---
MAINTAINERS | 2 +-
drivers/platform/x86/Kconfig | 21 ------------------
drivers/platform/x86/Makefile | 1 -
drivers/platform/x86/intel/Kconfig | 1 +
drivers/platform/x86/intel/Makefile | 1 +
drivers/platform/x86/intel/pmc/Kconfig | 22 +++++++++++++++++++
drivers/platform/x86/intel/pmc/Makefile | 6 +++++
.../{intel_pmc_core.c => intel/pmc/core.c} | 2 +-
.../{intel_pmc_core.h => intel/pmc/core.h} | 0
.../pmc/pltdrv.c} | 0
10 files changed, 32 insertions(+), 24 deletions(-)
create mode 100644 drivers/platform/x86/intel/pmc/Kconfig
create mode 100644 drivers/platform/x86/intel/pmc/Makefile
rename drivers/platform/x86/{intel_pmc_core.c => intel/pmc/core.c} (99%)
rename drivers/platform/x86/{intel_pmc_core.h => intel/pmc/core.h} (100%)
rename drivers/platform/x86/{intel_pmc_core_pltdrv.c => intel/pmc/pltdrv.c} (100%)
diff --git a/MAINTAINERS b/MAINTAINERS
index c9467d2839f5..0dcf765682fc 100644
--- a/MAINTAINERS
+++ b/MAINTAINERS
@@ -9477,7 +9477,7 @@ M: David E Box <david.e.box@...el.com>
L: platform-driver-x86@...r.kernel.org
S: Maintained
F: Documentation/ABI/testing/sysfs-platform-intel-pmc
-F: drivers/platform/x86/intel_pmc_core*
+F: drivers/platform/x86/intel/pmc/core*
INTEL PMIC GPIO DRIVERS
M: Andy Shevchenko <andy@...nel.org>
diff --git a/drivers/platform/x86/Kconfig b/drivers/platform/x86/Kconfig
index 7d385c3b2239..cae72922f448 100644
--- a/drivers/platform/x86/Kconfig
+++ b/drivers/platform/x86/Kconfig
@@ -1184,27 +1184,6 @@ config INTEL_MRFLD_PWRBTN
To compile this driver as a module, choose M here: the module
will be called intel_mrfld_pwrbtn.
-config INTEL_PMC_CORE
- tristate "Intel PMC Core driver"
- depends on PCI
- depends on ACPI
- help
- The Intel Platform Controller Hub for Intel Core SoCs provides access
- to Power Management Controller registers via various interfaces. This
- driver can utilize debugging capabilities and supported features as
- exposed by the Power Management Controller. It also may perform some
- tasks in the PMC in order to enable transition into the SLPS0 state.
- It should be selected on all Intel platforms supported by the driver.
-
- Supported features:
- - SLP_S0_RESIDENCY counter
- - PCH IP Power Gating status
- - LTR Ignore / LTR Show
- - MPHY/PLL gating status (Sunrisepoint PCH only)
- - SLPS0 Debug registers (Cannonlake/Icelake PCH)
- - Low Power Mode registers (Tigerlake and beyond)
- - PMC quirks as needed to enable SLPS0/S0ix
-
config INTEL_PMT_CLASS
tristate
help
diff --git a/drivers/platform/x86/Makefile b/drivers/platform/x86/Makefile
index 7ee369aab10d..43d36f8c36f1 100644
--- a/drivers/platform/x86/Makefile
+++ b/drivers/platform/x86/Makefile
@@ -128,7 +128,6 @@ obj-$(CONFIG_INTEL_UNCORE_FREQ_CONTROL) += intel-uncore-frequency.o
obj-$(CONFIG_INTEL_BXTWC_PMIC_TMU) += intel_bxtwc_tmu.o
obj-$(CONFIG_INTEL_CHTDC_TI_PWRBTN) += intel_chtdc_ti_pwrbtn.o
obj-$(CONFIG_INTEL_MRFLD_PWRBTN) += intel_mrfld_pwrbtn.o
-obj-$(CONFIG_INTEL_PMC_CORE) += intel_pmc_core.o intel_pmc_core_pltdrv.o
obj-$(CONFIG_INTEL_PMT_CLASS) += intel_pmt_class.o
obj-$(CONFIG_INTEL_PMT_TELEMETRY) += intel_pmt_telemetry.o
obj-$(CONFIG_INTEL_PMT_CRASHLOG) += intel_pmt_crashlog.o
diff --git a/drivers/platform/x86/intel/Kconfig b/drivers/platform/x86/intel/Kconfig
index f2eef337eb98..8ca021785f67 100644
--- a/drivers/platform/x86/intel/Kconfig
+++ b/drivers/platform/x86/intel/Kconfig
@@ -18,5 +18,6 @@ if X86_PLATFORM_DRIVERS_INTEL
source "drivers/platform/x86/intel/int33fe/Kconfig"
source "drivers/platform/x86/intel/int3472/Kconfig"
+source "drivers/platform/x86/intel/pmc/Kconfig"
endif # X86_PLATFORM_DRIVERS_INTEL
diff --git a/drivers/platform/x86/intel/Makefile b/drivers/platform/x86/intel/Makefile
index 0653055942d5..49962f4dfdec 100644
--- a/drivers/platform/x86/intel/Makefile
+++ b/drivers/platform/x86/intel/Makefile
@@ -6,3 +6,4 @@
obj-$(CONFIG_INTEL_CHT_INT33FE) += int33fe/
obj-$(CONFIG_INTEL_SKL_INT3472) += int3472/
+obj-$(CONFIG_INTEL_PMC_CORE) += pmc/
diff --git a/drivers/platform/x86/intel/pmc/Kconfig b/drivers/platform/x86/intel/pmc/Kconfig
new file mode 100644
index 000000000000..b4c955a35674
--- /dev/null
+++ b/drivers/platform/x86/intel/pmc/Kconfig
@@ -0,0 +1,22 @@
+# SPDX-License-Identifier: GPL-2.0-only
+
+config INTEL_PMC_CORE
+ tristate "Intel PMC Core driver"
+ depends on PCI
+ depends on ACPI
+ help
+ The Intel Platform Controller Hub for Intel Core SoCs provides access
+ to Power Management Controller registers via various interfaces. This
+ driver can utilize debugging capabilities and supported features as
+ exposed by the Power Management Controller. It also may perform some
+ tasks in the PMC in order to enable transition into the SLPS0 state.
+ It should be selected on all Intel platforms supported by the driver.
+
+ Supported features:
+ - SLP_S0_RESIDENCY counter
+ - PCH IP Power Gating status
+ - LTR Ignore / LTR Show
+ - MPHY/PLL gating status (Sunrisepoint PCH only)
+ - SLPS0 Debug registers (Cannonlake/Icelake PCH)
+ - Low Power Mode registers (Tigerlake and beyond)
+ - PMC quirks as needed to enable SLPS0/S0ix
diff --git a/drivers/platform/x86/intel/pmc/Makefile b/drivers/platform/x86/intel/pmc/Makefile
new file mode 100644
index 000000000000..d819955543fe
--- /dev/null
+++ b/drivers/platform/x86/intel/pmc/Makefile
@@ -0,0 +1,6 @@
+# SPDX-License-Identifier: GPL-2.0
+#
+
+obj-$(CONFIG_INTEL_PMC_CORE) += intel_pmc_core.o
+intel_pmc_core-objs += core.o
+obj-$(CONFIG_INTEL_PMC_CORE) += pltdrv.o
diff --git a/drivers/platform/x86/intel_pmc_core.c b/drivers/platform/x86/intel/pmc/core.c
similarity index 99%
rename from drivers/platform/x86/intel_pmc_core.c
rename to drivers/platform/x86/intel/pmc/core.c
index b0e486a6bdfb..f9de78b08e5d 100644
--- a/drivers/platform/x86/intel_pmc_core.c
+++ b/drivers/platform/x86/intel/pmc/core.c
@@ -31,7 +31,7 @@
#include <asm/msr.h>
#include <asm/tsc.h>
-#include "intel_pmc_core.h"
+#include "core.h"
#define ACPI_S0IX_DSM_UUID "57a6512e-3979-4e9d-9708-ff13b2508972"
#define ACPI_GET_LOW_MODE_REGISTERS 1
diff --git a/drivers/platform/x86/intel_pmc_core.h b/drivers/platform/x86/intel/pmc/core.h
similarity index 100%
rename from drivers/platform/x86/intel_pmc_core.h
rename to drivers/platform/x86/intel/pmc/core.h
diff --git a/drivers/platform/x86/intel_pmc_core_pltdrv.c b/drivers/platform/x86/intel/pmc/pltdrv.c
similarity index 100%
rename from drivers/platform/x86/intel_pmc_core_pltdrv.c
rename to drivers/platform/x86/intel/pmc/pltdrv.c
--
2.25.1
Powered by blists - more mailing lists