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Message-ID: <CAAOTY_9sasTb=W3Kkhx-UZ-ATSe_ge8A14pmOHFCOQjag89r0Q@mail.gmail.com>
Date: Sun, 1 Aug 2021 08:36:54 +0800
From: Chun-Kuang Hu <chunkuang.hu@...nel.org>
To: "jason-jh.lin" <jason-jh.lin@...iatek.com>
Cc: Rob Herring <robh+dt@...nel.org>,
Matthias Brugger <matthias.bgg@...il.com>,
Chun-Kuang Hu <chunkuang.hu@...nel.org>,
Philipp Zabel <p.zabel@...gutronix.de>,
Enric Balletbo i Serra <enric.balletbo@...labora.com>,
fshao@...omium.org, David Airlie <airlied@...ux.ie>,
Daniel Vetter <daniel@...ll.ch>,
Hsin-Yi Wang <hsinyi@...omium.org>,
Yongqiang Niu <yongqiang.niu@...iatek.com>,
Nancy Lin <nancy.lin@...iatek.com>, singo.chang@...iatek.com,
DTML <devicetree@...r.kernel.org>,
Linux ARM <linux-arm-kernel@...ts.infradead.org>,
"moderated list:ARM/Mediatek SoC support"
<linux-mediatek@...ts.infradead.org>,
linux-kernel <linux-kernel@...r.kernel.org>,
DRI Development <dri-devel@...ts.freedesktop.org>
Subject: Re: [PATCH v5 1/6] arm64: dts: mt8195: add display node for vdosys0
Hi, Jason:
jason-jh.lin <jason-jh.lin@...iatek.com> 於 2021年7月30日 週五 上午1:07寫道:
>
> Add display node for vdosys0.
>
> Signed-off-by: jason-jh.lin <jason-jh.lin@...iatek.com>
> ---
> This patch is based on [1][2][3][4]
>
> [1]arm64: dts: Add Mediatek SoC MT8195 and evaluation board dts and Makefile
> - https://patchwork.kernel.org/project/linux-mediatek/patch/20210601075350.31515-2-seiya.wang@mediatek.com/
> [2]arm64: dts: mt8195: add IOMMU and smi nodes
> - https://patchwork.kernel.org/project/linux-mediatek/patch/20210615173233.26682-15-tinghan.shen@mediatek.com/
> [3]arm64: dts: mt8195: add gce node
> - https://patchwork.kernel.org/project/linux-mediatek/patch/20210705053429.4380-4-jason-jh.lin@mediatek.com/
> [4]add mt8195 SoC DRM binding
> - https://patchwork.kernel.org/project/linux-mediatek/list/?series=519597
> ---
> arch/arm64/boot/dts/mediatek/mt8195.dtsi | 112 +++++++++++++++++++++++
> 1 file changed, 112 insertions(+)
>
> diff --git a/arch/arm64/boot/dts/mediatek/mt8195.dtsi b/arch/arm64/boot/dts/mediatek/mt8195.dtsi
> index 04d3e95175fa..4fa47cb2bede 100644
> --- a/arch/arm64/boot/dts/mediatek/mt8195.dtsi
> +++ b/arch/arm64/boot/dts/mediatek/mt8195.dtsi
> @@ -1155,9 +1155,121 @@
> #clock-cells = <1>;
> };
>
[snip]
> +
> + merge0: disp_vpp_merge0@...14000 {
> + compatible = "mediatek,mt8195-disp-merge";
> + reg = <0 0x1c014000 0 0x1000>;
> + interrupts = <GIC_SPI 656 IRQ_TYPE_LEVEL_HIGH 0>;
> + power-domains = <&spm MT8195_POWER_DOMAIN_VDOSYS0>;
> + clocks = <&vdosys0 CLK_VDO0_VPP_MERGE0>;
Why this merge has no async clock?
Regards,
Chun-Kuang.
> + mediatek,gce-client-reg =
> + <&gce1 SUBSYS_1c01XXXX 0x4000 0x1000>;
> + };
> +
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