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Message-ID: <e28d7d75-a7f2-eae2-f884-9a21ff6555d7@redhat.com>
Date: Tue, 3 Aug 2021 14:19:20 +0200
From: Hans de Goede <hdegoede@...hat.com>
To: Gayatri Kammela <gayatri.kammela@...el.com>,
platform-driver-x86@...r.kernel.org
Cc: mgross@...ux.intel.com, irenic.rajneesh@...il.com,
andriy.shevchenko@...ux.intel.com, vicamo.yang@...onical.com,
srinivas.pandruvada@...el.com, david.e.box@...el.com,
chao.qin@...el.com, linux-kernel@...r.kernel.org,
tamar.mashiah@...el.com, gregkh@...uxfoundation.org,
rajatja@...gle.com, Shyam-sundar.S-k@....com,
Alexander.Deucher@....com, mlimonci@....com
Subject: Re: [PATCH v6 0/5] Add Alder Lake PCH-S support to PMC core driver
Hi Gayatri,
On 7/31/21 8:07 AM, Gayatri Kammela wrote:
> Hi,
> The patch series move intel_pmc_core* files to pmc subfolder as well as
> add Alder Lake PCH-S support to PMC core driver.
>
> Patch 1: Move intel_pmc_core* files to pmc subfolder
> Patch 2: Add Alderlake support to pmc core driver
> Patch 3: Add Latency Tolerance Reporting (LTR) support to Alder Lake
> Patch 4: Add Alder Lake low power mode support for pmc core
> Patch 5: Add GBE Package C10 fix for Alder Lake
>
> Changes since v1:
> 1) Add patch 1 to v2 i.e., Move intel_pmc_core* files to pmc subfolder.
> 2) Modify commit message for patch 2.
>
> Changes since v2:
> 1) Dropped intel_pmc_ prefix from the file names.
>
> Changes since v3:
> 1) Fixed an error reported by lkp.
>
> Changes since v4:
> 1) Updated MAINTAINERS
>
> Changes since v5:
> 1) Fixed an module name error reported by Chao Qin
Thank you for fixing this.
I expect that you will send a new version addressing Andy's remarks,
so I'm going to drop this version from my queue.
Regards,
Hans
> David E. Box (1):
> platform/x86/intel: pmc/core: Add GBE Package C10 fix for Alder Lake
> PCH
>
> Gayatri Kammela (4):
> platform/x86/intel: intel_pmc_core: Move intel_pmc_core* files to pmc
> subfolder
> platform/x86/intel: pmc/core: Add Alderlake support to pmc core driver
> platform/x86/intel: pmc/core: Add Latency Tolerance Reporting (LTR)
> support to Alder Lake
> platform/x86/intel: pmc/core: Add Alder Lake low power mode support
> for pmc core
>
> MAINTAINERS | 2 +-
> drivers/platform/x86/Kconfig | 21 --
> drivers/platform/x86/Makefile | 1 -
> drivers/platform/x86/intel/Kconfig | 1 +
> drivers/platform/x86/intel/Makefile | 1 +
> drivers/platform/x86/intel/pmc/Kconfig | 22 ++
> drivers/platform/x86/intel/pmc/Makefile | 6 +
> .../{intel_pmc_core.c => intel/pmc/core.c} | 309 +++++++++++++++++-
> .../{intel_pmc_core.h => intel/pmc/core.h} | 17 +
> .../pmc/pltdrv.c} | 0
> 10 files changed, 353 insertions(+), 27 deletions(-)
> create mode 100644 drivers/platform/x86/intel/pmc/Kconfig
> create mode 100644 drivers/platform/x86/intel/pmc/Makefile
> rename drivers/platform/x86/{intel_pmc_core.c => intel/pmc/core.c} (85%)
> rename drivers/platform/x86/{intel_pmc_core.h => intel/pmc/core.h} (95%)
> rename drivers/platform/x86/{intel_pmc_core_pltdrv.c => intel/pmc/pltdrv.c} (100%)
>
> Cc: Srinivas Pandruvada <srinivas.pandruvada@...el.com>
> Cc: Andy Shevchenko <andriy.shevchenko@...ux.intel.com>
> Cc: David Box <david.e.box@...el.com>
> Cc: You-Sheng Yang <vicamo.yang@...onical.com>
> Cc: Hans de Goede <hdegoede@...hat.com>
> Cc: Rajneesh Bhardwaj <irenic.rajneesh@...il.com>
> Cc: Chao Qin <chao.qin@...el.com>
>
> base-commit: c7d102232649226a69dddd58a4942cf13cff4f7c
>
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