linux-kernel - [PATCH] mtd: rawnand: xway: No hardcoded ECC engine for Micron Chips

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Message-ID: <20210803143256.GA5209@ubuntu>
Date:   Tue, 3 Aug 2021 16:32:56 +0200
From:   Daniel Kestrel <kestrelseventyfour@...il.com>
To:     unlisted-recipients:; (no To-header on input)
Cc:     Miquel Raynal <miquel.raynal@...tlin.com>,
        Richard Weinberger <richard@....at>,
        Vignesh Raghavendra <vigneshr@...com>,
        Boris Brezillon <boris.brezillon@...labora.com>,
        Daniel Kestrel <kestrelseventyfour@...il.com>,
        linux-mtd@...ts.infradead.org, linux-kernel@...r.kernel.org
Subject: [PATCH] mtd: rawnand: xway: No hardcoded ECC engine for Micron Chips

Some lantiq xway devices use Micron NAND chips, which use on-die ECC.
The hardcoded setting of NAND_ECC_ENGINE_TYPE_SOFT makes them unusable,
because the software ECC on top of the hardware ECC produces errors for
every read and write access, not to mention that booting does not work,
because the boot loader uses the correct ECC when trying to load the
kernel and stops loading on severe ECC errors.
Removing the hardcoded settings would break a number of devices that
work with those settings.
Adding a DTB property was considered, but did not work, because devices
of the same type but from different manufacture dates have different
NAND chips and as such it is not possible to determine the NAND chip
in advance or device specific.

Signed-off-by: Daniel Kestrel <kestrelseventyfour@...il.com>
---
 drivers/mtd/nand/raw/xway_nand.c | 4 +++-
 1 file changed, 3 insertions(+), 1 deletion(-)

diff --git a/drivers/mtd/nand/raw/xway_nand.c b/drivers/mtd/nand/raw/xway_nand.c
index 26751976e502..20cb5ce2f3b0 100644
--- a/drivers/mtd/nand/raw/xway_nand.c
+++ b/drivers/mtd/nand/raw/xway_nand.c
@@ -10,6 +10,7 @@
 #include <linux/of_platform.h>

 #include <lantiq_soc.h>
+#include "internals.h"

 /* nand registers */
 #define EBU_ADDSEL1		0x24
@@ -148,7 +149,8 @@ static void xway_write_buf(struct nand_chip *chip, const u_char *buf, int len)

 static int xway_attach_chip(struct nand_chip *chip)
 {
-	chip->ecc.engine_type = NAND_ECC_ENGINE_TYPE_SOFT;
+	if (chip->manufacturer.desc->id != NAND_MFR_MICRON)
+		chip->ecc.engine_type = NAND_ECC_ENGINE_TYPE_SOFT;

 	if (chip->ecc.algo == NAND_ECC_ALGO_UNKNOWN)
 		chip->ecc.algo = NAND_ECC_ALGO_HAMMING;
-- 
2.17.1