lists.openwall.net   lists  /  announce  owl-users  owl-dev  john-users  john-dev  passwdqc-users  yescrypt  popa3d-users  /  oss-security  kernel-hardening  musl  sabotage  tlsify  passwords  /  crypt-dev  xvendor  /  Bugtraq  Full-Disclosure  linux-kernel  linux-netdev  linux-ext4  linux-hardening  linux-cve-announce  PHC 
Open Source and information security mailing list archives
 
Hash Suite: Windows password security audit tool. GUI, reports in PDF.
[<prev] [next>] [<thread-prev] [thread-next>] [day] [month] [year] [list]
Message-ID: <87mtpxwaol.wl-maz@kernel.org>
Date:   Wed, 04 Aug 2021 15:23:38 +0100
From:   Marc Zyngier <maz@...nel.org>
To:     Huacai Chen <chenhuacai@...il.com>
Cc:     Huacai Chen <chenhuacai@...ngson.cn>,
        Thomas Gleixner <tglx@...utronix.de>,
        LKML <linux-kernel@...r.kernel.org>,
        Xuefeng Li <lixuefeng@...ngson.cn>,
        Jiaxun Yang <jiaxun.yang@...goat.com>,
        Chen Zhu <zhuchen@...ngson.cn>
Subject: Re: [PATCH 2/9] irqchip/loongson-pch-pic: Improve edge triggered interrupt support

On Fri, 09 Jul 2021 04:00:58 +0100,
Huacai Chen <chenhuacai@...il.com> wrote:
> 
> Hi, Marc,
> 
> On Tue, Jul 6, 2021 at 9:06 PM Marc Zyngier <maz@...nel.org> wrote:
> >
> > On Tue, 06 Jul 2021 04:08:57 +0100,
> > Huacai Chen <chenhuacai@...ngson.cn> wrote:
> > >
> > > Edge-triggered mode and level-triggered mode need different handlers,
> > > and edge-triggered mode need a specific ack operation. So improve it.
> > >
> >
> > Is this a fix? How does it work currently?
> Yes, some devices (e.g., RTC) is edge-triggered, they need
> handle_edge_irq(). Currently we don't use RTC interrupt in the
> upstream kernel on Loongson platform, so it "works".

If you want me to queue this independently of the full LoongArch
series, please resend it with a Fixes: tag.

Thanks,

	M.

-- 
Without deviation from the norm, progress is not possible.

Powered by blists - more mailing lists

Powered by Openwall GNU/*/Linux Powered by OpenVZ