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Message-ID: <d0ff051b-280c-4021-f4ee-7bfda5e356d3@biot.com>
Date: Wed, 4 Aug 2021 18:41:55 +0200
From: Bert Vermeulen <bert@...t.com>
To: Mark Rutland <mark.rutland@....com>
Cc: devicetree@...r.kernel.org, linux-kernel@...r.kernel.org,
linux-arm-kernel@...ts.infradead.org,
Arnd Bergmann <arnd@...db.de>, Olof Johansson <olof@...om.net>,
soc@...nel.org, Rob Herring <robh+dt@...nel.org>,
John Crispin <john@...ozen.org>, Felix Fietkau <nbd@....name>
Subject: Re: [PATCH 3/5] ARM: dts: Add basic support for EcoNet EN7523
On 7/30/21 4:46 PM, Mark Rutland wrote:
> On Fri, Jul 30, 2021 at 03:45:50PM +0200, Bert Vermeulen wrote:
>> + timer {
>> + compatible = "arm,armv8-timer";
>
> This should be "arm,armv7-timer".
>
>> + interrupt-parent = <&gic>;
>> + interrupts = <GIC_PPI 13 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>,
>> + <GIC_PPI 14 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>,
>> + <GIC_PPI 11 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>,
>> + <GIC_PPI 10 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>;
>
> GICv3 doesn't have a cpumask in its PPI description, so the
> GIC_CPU_MASK_SIMPLE() bits should be removed.
Ok, will fix.
>> + clock-frequency = <25000000>;
>
> Please have your FW configure CNTFRQ on each CPU; the clock-frequency
> property in the DT is a workaround for broken FW, and it's *vastly*
> preferable for FW to configure this correctly (e.g. as it means VMs
> should "just work").
I've since got hold of the modified U-Boot that runs on my eval board, and
indeed it doesn't set CNTFRQ. So the kernel does need this, for the moment.
I may get a chance to upstream support for this SoC in U-Boot, but I can't
control what people are going to ship with their board. Is it ok to leave
this in?
--
Bert Vermeulen
bert@...t.com
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