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Message-ID: <YQxp6gg4W/pZsGuW@google.com>
Date: Thu, 5 Aug 2021 22:44:58 +0000
From: Sean Christopherson <seanjc@...gle.com>
To: Jim Mattson <jmattson@...gle.com>
Cc: Wei Huang <wei.huang2@....com>, kvm@...r.kernel.org,
linux-kernel@...r.kernel.org, pbonzini@...hat.com,
vkuznets@...hat.com, wanpengli@...cent.com, joro@...tes.org,
tglx@...utronix.de, mingo@...hat.com, bp@...en8.de, x86@...nel.org,
hpa@...or.com
Subject: Re: [PATCH v1 1/3] KVM: x86: Convert TDP level calculation to
vendor's specific code
On Thu, Aug 05, 2021, Jim Mattson wrote:
> On Thu, Aug 5, 2021 at 1:55 PM Wei Huang <wei.huang2@....com> wrote:
> >
> > This design assumes that all x86 CPUs have the flexibility of changing the
> > nested page table level different from host CPU.
>
> I can't even parse this sentence. What are you trying to say here?
NPT inherits the host's CR4, and thus CR4.LA57. So KVM NPT is stuck using whatever
N-level paging the host kernel is using.
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