[<prev] [next>] [<thread-prev] [thread-next>] [day] [month] [year] [list]
Message-ID: <CAPLW+4m5LWr5hQi9P8ywZbhNyj8Fwdkk4B_O_YgM_DthWSG9BA@mail.gmail.com>
Date: Thu, 5 Aug 2021 14:26:36 +0300
From: Sam Protsenko <semen.protsenko@...aro.org>
To: Krzysztof Kozlowski <krzysztof.kozlowski@...onical.com>
Cc: Rob Herring <robh+dt@...nel.org>,
devicetree <devicetree@...r.kernel.org>,
linux-arm Mailing List <linux-arm-kernel@...ts.infradead.org>,
Linux Samsung SOC <linux-samsung-soc@...r.kernel.org>,
Linux Kernel Mailing List <linux-kernel@...r.kernel.org>,
Alim Akhtar <alim.akhtar@...sung.com>,
Chanwoo Choi <cw00.choi@...sung.com>,
Pankaj Dubey <pankaj.dubey@...sung.com>,
Marc Zyngier <maz@...nel.org>
Subject: Re: [PATCH] arm64: dts: exynos: correct GIC CPU interfaces address
range on Exynos7
Hi Krzysztof,
On Thu, 5 Aug 2021 at 10:22, Krzysztof Kozlowski
<krzysztof.kozlowski@...onical.com> wrote:
>
> The GIC-400 CPU interfaces address range is defined as 0x2000-0x3FFF (by
> ARM).
>
> Reported-by: Sam Protsenko <semen.protsenko@...aro.org>
> Reported-by: Marc Zyngier <maz@...nel.org>
> Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@...onical.com>
> ---
Reviewed-by: Sam Protsenko <semen.protsenko@...aro.org>
> arch/arm64/boot/dts/exynos/exynos7.dtsi | 2 +-
> 1 file changed, 1 insertion(+), 1 deletion(-)
>
> diff --git a/arch/arm64/boot/dts/exynos/exynos7.dtsi b/arch/arm64/boot/dts/exynos/exynos7.dtsi
> index 8b06397ba6e7..c73a597ca66e 100644
> --- a/arch/arm64/boot/dts/exynos/exynos7.dtsi
> +++ b/arch/arm64/boot/dts/exynos/exynos7.dtsi
> @@ -137,7 +137,7 @@ gic: interrupt-controller@...01000 {
> #address-cells = <0>;
> interrupt-controller;
> reg = <0x11001000 0x1000>,
> - <0x11002000 0x1000>,
> + <0x11002000 0x2000>,
> <0x11004000 0x2000>,
> <0x11006000 0x2000>;
> };
> --
> 2.30.2
>
Powered by blists - more mailing lists