linux-kernel - Re: [PATCH 00/11] ARC atomics update

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Message-ID: <2c2bed36-1bcf-ae34-0e94-9110c7e2b242@synopsys.com>
Date:   Thu, 5 Aug 2021 16:18:29 +0000
From:   Vineet Gupta <Vineet.Gupta1@...opsys.com>
To:     Peter Zijlstra <peterz@...radead.org>,
        Vineet Gupta <Vineet.Gupta1@...opsys.com>
CC:     "linux-snps-arc@...ts.infradead.org" 
        <linux-snps-arc@...ts.infradead.org>,
        Will Deacon <will@...nel.org>, Arnd Bergmann <arnd@...db.de>,
        Mark Rutland <mark.rutland@....com>,
        "linux-kernel@...r.kernel.org" <linux-kernel@...r.kernel.org>,
        "linux-arch@...r.kernel.org" <linux-arch@...r.kernel.org>,
        Vladimir Isaev <Vladimir.Isaev@...opsys.com>
Subject: Re: [PATCH 00/11] ARC atomics update

On 8/5/21 2:02 AM, Peter Zijlstra wrote:
> On Wed, Aug 04, 2021 at 12:15:43PM -0700, Vineet Gupta wrote:
> 
>> Vineet Gupta (10):
>>    ARC: atomics: disintegrate header
>>    ARC: atomic: !LLSC: remove hack in atomic_set() for for UP
>>    ARC: atomic: !LLSC: use int data type consistently
>>    ARC: atomic64: LLSC: elide unused atomic_{and,or,xor,andnot}_return
>>    ARC: atomics: implement relaxed variants
>>    ARC: bitops: fls/ffs to take int (vs long) per asm-generic defines
>>    ARC: xchg: !LLSC: remove UP micro-optimization/hack
>>    ARC: cmpxchg/xchg: rewrite as macros to make type safe
>>    ARC: cmpxchg/xchg: implement relaxed variants (LLSC config only)
>>    ARC: atomic_cmpxchg/atomic_xchg: implement relaxed variants
>>
>> Will Deacon (1):
>>    ARC: switch to generic bitops
> 
> Didn't see any weird things:
> 
> Acked-by: Peter Zijlstra (Intel) <peterz@...radead.org>

Thx Peter. A lot of this is your code anyways ;-)

Any initial thoughts/comments on patch 06/11 - is there an obvious 
reason that generic bitops take signed @nr or the hurdle is need to be 
done consistently cross-arch.

-Vineet