linux-kernel - Re: [PATCH 1/8] ASoC: cs42l42: PLL must be running when changing MCLK_SRC

lists.openwall.net		lists / announce owl-users owl-dev john-users john-dev passwdqc-users yescrypt popa3d-users / oss-security kernel-hardening musl sabotage tlsify passwords / crypt-dev xvendor / Bugtraq Full-Disclosure linux-kernel linux-netdev linux-ext4 linux-hardening linux-cve-announce PHC
Open Source and information security mailing list archives

Hash Suite: Windows password security audit tool. GUI, reports in PDF.

[<prev] [next>] [<thread-prev] [thread-next>] [day] [month] [year] [list]

Date:   Fri, 6 Aug 2021 01:45:59 +0100
From:   Mark Brown <broonie@...nel.org>
To:     Richard Fitzgerald <rf@...nsource.cirrus.com>
Cc:     alsa-devel@...a-project.org, patches@...nsource.cirrus.com,
        linux-kernel@...r.kernel.org
Subject: Re: [PATCH 1/8] ASoC: cs42l42: PLL must be running when changing
 MCLK_SRC_SEL

On Thu, Aug 05, 2021 at 05:11:04PM +0100, Richard Fitzgerald wrote:
> Both SCLK and PLL clocks must be running to drive the glitch-free mux
> behind MCLK_SRC_SEL and complete the switchover.

Please provide a cover letter for serieses, it helps give an overview of
what's going on and is useful for tooling.

Download attachment "signature.asc" of type "application/pgp-signature" (489 bytes)