linux-kernel - Re: [PATCH 1/8] ASoC: cs42l42: PLL must be running when changing MCLK_SRC

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Message-ID: <20210806004558.GT26252@sirena.org.uk>
Date:   Fri, 6 Aug 2021 01:45:59 +0100
From:   Mark Brown <broonie@...nel.org>
To:     Richard Fitzgerald <rf@...nsource.cirrus.com>
Cc:     alsa-devel@...a-project.org, patches@...nsource.cirrus.com,
        linux-kernel@...r.kernel.org
Subject: Re: [PATCH 1/8] ASoC: cs42l42: PLL must be running when changing
 MCLK_SRC_SEL

On Thu, Aug 05, 2021 at 05:11:04PM +0100, Richard Fitzgerald wrote:
> Both SCLK and PLL clocks must be running to drive the glitch-free mux
> behind MCLK_SRC_SEL and complete the switchover.

Please provide a cover letter for serieses, it helps give an overview of
what's going on and is useful for tooling.

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