linux-kernel - Re: [PATCH 0/3] CM4 ACPI PCIe quirk

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Date:   Fri, 6 Aug 2021 13:40:04 +0200
From:   Stefan Wahren <stefan.wahren@...e.com>
To:     Jeremy Linton <jeremy.linton@....com>
Cc:     linux-pci@...r.kernel.org, lorenzo.pieralisi@....com,
        nsaenz@...nel.org, bhelgaas@...gle.com, rjw@...ysocki.net,
        lenb@...nel.org, robh@...nel.org, kw@...ux.com,
        f.fainelli@...il.com, bcm-kernel-feedback-list@...adcom.com,
        linux-acpi@...r.kernel.org, linux-arm-kernel@...ts.infradead.org,
        linux-rpi-kernel@...ts.infradead.org, linux-kernel@...r.kernel.org
Subject: Re: [PATCH 0/3] CM4 ACPI PCIe quirk

Hi Jeremy,

Am 05.08.21 um 23:11 schrieb Jeremy Linton:
> The PFTF CM4 is an ACPI platform that is following the PCIe SMCCC
> standard because its PCIe config space isn't ECAM compliant and is
> split into two parts. One part for the root port registers and a
> moveable window which points at a given device's 4K config space.
> Thus it doesn't have a MCFG (and really any MCFG provided would be
> nonsense anyway). As linux doesn't support the PCIe SMCCC standard
> we key off a linux specific host bridge _DSD to add custom ECAM
> ops and cfgres. The cfg op selects between those two regions, as
> well as disallowing problematic accesses, particularly if the link
> is down because there isn't an attached device.

i just want to inform you, that i recently submitted the inital patch
series for DT support regarding CM4 [1].

I left out anything related to PCIe (including downstream changes to
pcie-brcmstb).

Best regards
Stefan

[1] - https://marc.info/?l=linux-arm-kernel&m=162782110325813&w=2