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Message-ID: <20210809081628.GT30984@dragon>
Date: Mon, 9 Aug 2021 16:16:29 +0800
From: Shawn Guo <shawnguo@...nel.org>
To: "Peng Fan (OSS)" <peng.fan@....nxp.com>
Cc: robh+dt@...nel.org, s.hauer@...gutronix.de, kernel@...gutronix.de,
festevam@...il.com, linux-imx@....com, p.zabel@...gutronix.de,
l.stach@...gutronix.de, krzk@...nel.org, agx@...xcpu.org,
marex@...x.de, andrew.smirnov@...il.com,
devicetree@...r.kernel.org, linux-arm-kernel@...ts.infradead.org,
linux-kernel@...r.kernel.org, aisheng.dong@....com,
Peng Fan <peng.fan@....com>
Subject: Re: [PATCH] arm64: dts: imx8qm: add smmu node
On Sat, Aug 07, 2021 at 06:45:17PM +0800, Peng Fan (OSS) wrote:
> From: Peng Fan <peng.fan@....com>
>
> i.MX8QM has an iommu unit: SMMU-V2(mmu-500), add it.
>
> Signed-off-by: Peng Fan <peng.fan@....com>
> ---
> arch/arm64/boot/dts/freescale/imx8qm.dtsi | 16 ++++++++++++++++
> 1 file changed, 16 insertions(+)
>
> diff --git a/arch/arm64/boot/dts/freescale/imx8qm.dtsi b/arch/arm64/boot/dts/freescale/imx8qm.dtsi
> index aebbe2b84aa1..b8ffd5be6a3e 100644
> --- a/arch/arm64/boot/dts/freescale/imx8qm.dtsi
> +++ b/arch/arm64/boot/dts/freescale/imx8qm.dtsi
> @@ -165,6 +165,22 @@ iomuxc: pinctrl {
>
> };
>
> + smmu: iommu@...00000 {
> + compatible = "arm,mmu-500";
> + reg = <0 0x51400000 0 0x40000>;
> + #iommu-cells = <2>;
> + #global-interrupts = <1>;
> + interrupts = <0 32 4>, <0 32 4>, <0 32 4>, <0 32 4>,
> + <0 32 4>, <0 32 4>, <0 32 4>, <0 32 4>,
> + <0 32 4>, <0 32 4>, <0 32 4>, <0 32 4>,
> + <0 32 4>, <0 32 4>, <0 32 4>, <0 32 4>,
> + <0 32 4>, <0 32 4>, <0 32 4>, <0 32 4>,
> + <0 32 4>, <0 32 4>, <0 32 4>, <0 32 4>,
> + <0 32 4>, <0 32 4>, <0 32 4>, <0 32 4>,
> + <0 32 4>, <0 32 4>, <0 32 4>, <0 32 4>,
> + <0 32 4>;
Use macro to make it more readable.
Shawn
> + };
> +
> /* sorted in register address */
> #include "imx8-ss-img.dtsi"
> #include "imx8-ss-dma.dtsi"
> --
> 2.30.0
>
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