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Date: Tue, 10 Aug 2021 11:29:54 +0530 From: Odelu Kukatla <okukatla@...eaurora.org> To: georgi.djakov@...aro.org, bjorn.andersson@...aro.org, evgreen@...gle.com, Andy Gross <agross@...nel.org>, Georgi Djakov <djakov@...nel.org>, Rob Herring <robh+dt@...nel.org>, Sibi Sankar <sibis@...eaurora.org>, linux-arm-msm@...r.kernel.org, linux-pm@...r.kernel.org, devicetree@...r.kernel.org, linux-kernel@...r.kernel.org Cc: sboyd@...nel.org, mdtipton@...eaurora.org, saravanak@...gle.com, okukatla@...eaurora.org, seansw@....qualcomm.com, elder@...aro.org, linux-arm-msm-owner@...r.kernel.org Subject: [v5 1/3] dt-bindings: interconnect: Add EPSS L3 DT binding on SC7280 Add Epoch Subsystem (EPSS) L3 interconnect provider binding on SC7280 SoCs. Signed-off-by: Odelu Kukatla <okukatla@...eaurora.org> --- .../devicetree/bindings/interconnect/qcom,osm-l3.yaml | 9 ++++++++- include/dt-bindings/interconnect/qcom,osm-l3.h | 10 +++++++++- 2 files changed, 17 insertions(+), 2 deletions(-) diff --git a/Documentation/devicetree/bindings/interconnect/qcom,osm-l3.yaml b/Documentation/devicetree/bindings/interconnect/qcom,osm-l3.yaml index e701524..919fce4 100644 --- a/Documentation/devicetree/bindings/interconnect/qcom,osm-l3.yaml +++ b/Documentation/devicetree/bindings/interconnect/qcom,osm-l3.yaml @@ -18,13 +18,20 @@ properties: compatible: enum: - qcom,sc7180-osm-l3 + - qcom,sc7280-epss-l3 - qcom,sc8180x-osm-l3 - qcom,sdm845-osm-l3 - qcom,sm8150-osm-l3 - qcom,sm8250-epss-l3 reg: - maxItems: 1 + minItems: 1 + maxItems: 4 + items: + - description: OSM clock domain-0 base address and size + - description: OSM clock domain-1 base address and size + - description: OSM clock domain-2 base address and size + - description: OSM clock domain-3 base address and size clocks: items: diff --git a/include/dt-bindings/interconnect/qcom,osm-l3.h b/include/dt-bindings/interconnect/qcom,osm-l3.h index 61ef649..99534a5 100644 --- a/include/dt-bindings/interconnect/qcom,osm-l3.h +++ b/include/dt-bindings/interconnect/qcom,osm-l3.h @@ -1,6 +1,6 @@ /* SPDX-License-Identifier: GPL-2.0 */ /* - * Copyright (C) 2019 The Linux Foundation. All rights reserved. + * Copyright (C) 2019, 2021 The Linux Foundation. All rights reserved. */ #ifndef __DT_BINDINGS_INTERCONNECT_QCOM_OSM_L3_H @@ -11,5 +11,13 @@ #define MASTER_EPSS_L3_APPS 0 #define SLAVE_EPSS_L3_SHARED 1 +#define SLAVE_EPSS_L3_CPU0 2 +#define SLAVE_EPSS_L3_CPU1 3 +#define SLAVE_EPSS_L3_CPU2 4 +#define SLAVE_EPSS_L3_CPU3 5 +#define SLAVE_EPSS_L3_CPU4 6 +#define SLAVE_EPSS_L3_CPU5 7 +#define SLAVE_EPSS_L3_CPU6 8 +#define SLAVE_EPSS_L3_CPU7 9 #endif -- The Qualcomm Innovation Center, Inc. is a member of the Code Aurora Forum, a Linux Foundation Collaborative Project
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