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Message-ID: <CAMuHMdWy4JNZ2=Z+FdMdHukN6rGQMma7cc+Pm06AtsOk8j_eGA@mail.gmail.com>
Date: Tue, 10 Aug 2021 11:13:15 +0200
From: Geert Uytterhoeven <geert@...ux-m68k.org>
To: Lad Prabhakar <prabhakar.mahadev-lad.rj@...renesas.com>
Cc: Rob Herring <robh+dt@...nel.org>,
Linus Walleij <linus.walleij@...aro.org>,
Magnus Damm <magnus.damm@...il.com>,
"open list:GPIO SUBSYSTEM" <linux-gpio@...r.kernel.org>,
"open list:OPEN FIRMWARE AND FLATTENED DEVICE TREE BINDINGS"
<devicetree@...r.kernel.org>,
Linux-Renesas <linux-renesas-soc@...r.kernel.org>,
Linux Kernel Mailing List <linux-kernel@...r.kernel.org>,
Prabhakar <prabhakar.csengg@...il.com>,
Biju Das <biju.das.jz@...renesas.com>
Subject: Re: [PATCH v4 2/4] pinctrl: renesas: Add RZ/G2L pin and gpio
controller driver
Hi Prabhakar,
On Tue, Jul 27, 2021 at 1:23 PM Lad Prabhakar
<prabhakar.mahadev-lad.rj@...renesas.com> wrote:
> Add support for pin and gpio controller driver for RZ/G2L SoC.
>
> Based on a patch in the BSP by Hien Huynh <hien.huynh.px@...esas.com>.
>
> Signed-off-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@...renesas.com>
> Reviewed-by: Biju Das <biju.das.jz@...renesas.com>
Thanks for your patch!
> --- /dev/null
> +++ b/drivers/pinctrl/renesas/pinctrl-rzg2l.c
> +static void rzg2l_pinctrl_clk_disable(void *data)
> +{
> + struct clk *clk = data;
No need for the intermediate variable.
> +
> + clk_disable_unprepare(clk);
> +}
> +
> +static int rzg2l_pinctrl_probe(struct platform_device *pdev)
> +{
> + struct rzg2l_pinctrl *pctrl;
> + int ret;
> +
> + pctrl = devm_kzalloc(&pdev->dev, sizeof(*pctrl), GFP_KERNEL);
> + if (!pctrl)
> + return -ENOMEM;
> +
> + pctrl->dev = &pdev->dev;
> +
> + pctrl->data = of_device_get_match_data(&pdev->dev);
> + if (!pctrl->data)
> + return -EINVAL;
> +
> + pctrl->base = devm_platform_ioremap_resource(pdev, 0);
> + if (IS_ERR(pctrl->base))
> + return PTR_ERR(pctrl->base);
> +
> + pctrl->clk = devm_clk_get(pctrl->dev, NULL);
> + if (IS_ERR(pctrl->clk)) {
> + ret = PTR_ERR(pctrl->clk);
> + dev_err(pctrl->dev, "failed to get GPIO clk : %i\n", ret);
> + return ret;
> + };
> +
> + spin_lock_init(&pctrl->lock);
> +
> + platform_set_drvdata(pdev, pctrl);
> +
> + ret = clk_prepare_enable(pctrl->clk);
> + if (ret) {
> + dev_err(pctrl->dev, "failed to enable GPIO clk: %i\n", ret);
> + return ret;
> + };
> +
> + ret = devm_add_action_or_reset(&pdev->dev, rzg2l_pinctrl_clk_disable, pctrl->clk);
This line is a bit long.
> + if (ret) {
> + dev_err(pctrl->dev, "failed to register pinctrl clk disable devm action, %i\n",
Elsewhere, this is called the "GPIO clk".
This line is a bit long.
> + ret);
> + return ret;
> + }
> +
> + ret = rzg2l_pinctrl_register(pctrl);
> + if (ret)
> + return ret;
> +
> + dev_info(pctrl->dev, "%s support registered\n", DRV_NAME);
> + return 0;
> +}
Reviewed-by: Geert Uytterhoeven <geert+renesas@...der.be>
i.e. will queue in renesas-pinctrl-for-v5.15, with the above fixed, so no need
to resend.
Gr{oetje,eeting}s,
Geert
--
Geert Uytterhoeven -- There's lots of Linux beyond ia32 -- geert@...ux-m68k.org
In personal conversations with technical people, I call myself a hacker. But
when I'm talking to journalists I just say "programmer" or something like that.
-- Linus Torvalds
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