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Message-Id: <20210811181904.779316-1-swboyd@chromium.org>
Date:   Wed, 11 Aug 2021 11:19:04 -0700
From:   Stephen Boyd <swboyd@...omium.org>
To:     Andy Gross <agross@...nel.org>,
        Bjorn Andersson <bjorn.andersson@...aro.org>
Cc:     linux-kernel@...r.kernel.org, linux-arm-msm@...r.kernel.org,
        Matthias Kaehlcke <mka@...omium.org>,
        Alex Elder <elder@...aro.org>
Subject: [PATCH] arm64: dts: qcom: sc7280: Use GIC_SPI for intc cells

Let's use the GIC_SPI macro instead of a plain 0 here to match other
uses of the primary interrupt controller on sc7280.

Suggested-by: Matthias Kaehlcke <mka@...omium.org>
Cc: Alex Elder <elder@...aro.org>
Signed-off-by: Stephen Boyd <swboyd@...omium.org>
---
 arch/arm64/boot/dts/qcom/sc7280.dtsi | 4 ++--
 1 file changed, 2 insertions(+), 2 deletions(-)

diff --git a/arch/arm64/boot/dts/qcom/sc7280.dtsi b/arch/arm64/boot/dts/qcom/sc7280.dtsi
index f70ab3c5d08b..569802536321 100644
--- a/arch/arm64/boot/dts/qcom/sc7280.dtsi
+++ b/arch/arm64/boot/dts/qcom/sc7280.dtsi
@@ -598,8 +598,8 @@ ipa: ipa@...0000 {
 				    "ipa-shared",
 				    "gsi";
 
-			interrupts-extended = <&intc 0 654 IRQ_TYPE_EDGE_RISING>,
-					      <&intc 0 432 IRQ_TYPE_LEVEL_HIGH>,
+			interrupts-extended = <&intc GIC_SPI 654 IRQ_TYPE_EDGE_RISING>,
+					      <&intc GIC_SPI 432 IRQ_TYPE_LEVEL_HIGH>,
 					      <&ipa_smp2p_in 0 IRQ_TYPE_EDGE_RISING>,
 					      <&ipa_smp2p_in 1 IRQ_TYPE_EDGE_RISING>;
 			interrupt-names = "ipa",

base-commit: 97ec669dfcfa22f8a595356ceb6ce46e7b4a82e9
-- 
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