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Message-ID: <CADnq5_OVA1fB5x6=CGrd_5O-i=P7snmoJaTyauF2RKuWjc8Gog@mail.gmail.com>
Date: Wed, 11 Aug 2021 15:29:03 -0400
From: Alex Deucher <alexdeucher@...il.com>
To: Ramesh Errabolu <Ramesh.Errabolu@....com>
Cc: amd-gfx list <amd-gfx@...ts.freedesktop.org>,
Maling list - DRI developers
<dri-devel@...ts.freedesktop.org>,
Bjorn Helgaas <bhelgaas@...gle.com>,
Linux PCI <linux-pci@...r.kernel.org>,
LKML <linux-kernel@...r.kernel.org>
Subject: Re: [PATCH] Whitelist AMD host bridge device(s) to enable P2P DMA
On Wed, Aug 11, 2021 at 3:11 PM Ramesh Errabolu <Ramesh.Errabolu@....com> wrote:
>
> Current implementation will disallow P2P DMA if the participating
> devices belong to different root complexes. Implementation allows
> this default behavior to be overridden for whitelisted devices. The
> patch adds an AMD host bridge to be whitelisted
Why do we need this? cpu_supports_p2pdma() should return true for all
AMD Zen CPUs.
Alex
>
> Signed-off-by: Ramesh Errabolu <Ramesh.Errabolu@....com>
> ---
> drivers/pci/p2pdma.c | 2 ++
> 1 file changed, 2 insertions(+)
>
> diff --git a/drivers/pci/p2pdma.c b/drivers/pci/p2pdma.c
> index 196382630363..7003bb9faf23 100644
> --- a/drivers/pci/p2pdma.c
> +++ b/drivers/pci/p2pdma.c
> @@ -305,6 +305,8 @@ static const struct pci_p2pdma_whitelist_entry {
> {PCI_VENDOR_ID_INTEL, 0x2032, 0},
> {PCI_VENDOR_ID_INTEL, 0x2033, 0},
> {PCI_VENDOR_ID_INTEL, 0x2020, 0},
> + /* AMD Host Bridge Devices */
> + {PCI_VENDOR_ID_AMD, 0x1480, 0},
> {}
> };
>
> --
> 2.31.1
>
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