linux-kernel - [PATCH net-next 0/2] Adding Frame DMA functionality to Sparx5

lists.openwall.net		lists / announce owl-users owl-dev john-users john-dev passwdqc-users yescrypt popa3d-users / oss-security kernel-hardening musl sabotage tlsify passwords / crypt-dev xvendor / Bugtraq Full-Disclosure linux-kernel linux-netdev linux-ext4 linux-hardening linux-cve-announce PHC
Open Source and information security mailing list archives

Hash Suite for Android: free password hash cracker in your pocket

[<prev] [next>] [thread-next>] [day] [month] [year] [list]

Message-ID: <20210811075909.543633-1-steen.hegelund@microchip.com>
Date:   Wed, 11 Aug 2021 09:59:07 +0200
From:   Steen Hegelund <steen.hegelund@...rochip.com>
To:     "David S. Miller" <davem@...emloft.net>,
        Jakub Kicinski <kuba@...nel.org>,
        <UNGLinuxDriver@...rochip.com>, <netdev@...r.kernel.org>,
        <linux-arm-kernel@...ts.infradead.org>,
        <linux-kernel@...r.kernel.org>
CC:     Steen Hegelund <steen.hegelund@...rochip.com>,
        Alexandre Belloni <alexandre.belloni@...tlin.com>
Subject: [PATCH net-next 0/2] Adding Frame DMA functionality to Sparx5

This add frame DMA functionality to the Sparx5 platform.

Until now the Sparx5 SwitchDev driver has been using register based
injection and extraction when sending frames to/from the host CPU.

With this series the Frame DMA functionality now added.

The Frame DMA is only used if the Frame DMA interrupt is configured in the
device tree; otherwise the existing register based injection and extraction
is used.

The Sparx5 has two ports that can be used for sending and receiving frames,
but there are 8 channels that can be configured: 6 for injection and 2 for
extraction.

The additional channels can be used for more advanced scenarios e.g. where
virtual cores are used, but currently the driver only uses port 0 and
channel 0 and 6 respectively.

DCB (data control block) structures are passed to the Frame DMA with
suitable information about frame start/end etc, as well as pointers to DB
(data blocks) buffers.

The Frame DMA engine can use interrupts to signal back when the frames have
been injected or extracted.

There is a limitation on the DB alignment also for injection: Block must
start on 16byte boundaries, and this is why the driver currently copies the
data to into separate buffers.

The Sparx5 switch core needs a IFH (Internal Frame Header) to pass
information from the port to the switch core, and this header is added
before injection and stripped after extraction.

Steen Hegelund (2):
  net: sparx5: switchdev: adding frame DMA functionality
  arm64: dts: sparx5: Add the Sparx5 switch frame DMA support

 arch/arm64/boot/dts/microchip/sparx5.dtsi     |   5 +-
 .../net/ethernet/microchip/sparx5/Makefile    |   2 +-
 .../ethernet/microchip/sparx5/sparx5_fdma.c   | 595 ++++++++++++++++++
 .../ethernet/microchip/sparx5/sparx5_main.c   |  23 +-
 .../ethernet/microchip/sparx5/sparx5_main.h   |  69 ++
 .../ethernet/microchip/sparx5/sparx5_packet.c |  13 +-
 .../ethernet/microchip/sparx5/sparx5_port.c   |   2 +-
 .../ethernet/microchip/sparx5/sparx5_port.h   |   1 +
 8 files changed, 698 insertions(+), 12 deletions(-)
 create mode 100644 drivers/net/ethernet/microchip/sparx5/sparx5_fdma.c

--
2.32.0