lists.openwall.net | lists / announce owl-users owl-dev john-users john-dev passwdqc-users yescrypt popa3d-users / oss-security kernel-hardening musl sabotage tlsify passwords / crypt-dev xvendor / Bugtraq Full-Disclosure linux-kernel linux-netdev linux-ext4 linux-hardening PHC | |
Open Source and information security mailing list archives
| ||
|
Date: Wed, 11 Aug 2021 11:23:14 +0200 From: Linus Walleij <linus.walleij@...aro.org> To: Icenowy Zheng <icenowy@...eed.com> Cc: Rob Herring <robh+dt@...nel.org>, Maxime Ripard <mripard@...nel.org>, Chen-Yu Tsai <wens@...e.org>, Jernej Skrabec <jernej.skrabec@...il.com>, Ulf Hansson <ulf.hansson@...aro.org>, Alexandre Belloni <alexandre.belloni@...tlin.com>, Andre Przywara <andre.przywara@....com>, Samuel Holland <samuel@...lland.org>, "open list:OPEN FIRMWARE AND FLATTENED DEVICE TREE BINDINGS" <devicetree@...r.kernel.org>, Linux ARM <linux-arm-kernel@...ts.infradead.org>, linux-sunxi@...ts.linux.dev, linux-kernel <linux-kernel@...r.kernel.org> Subject: Re: [PATCH 07/17] pinctrl: sunxi: add support for R329 CPUX pin controller On Mon, Aug 2, 2021 at 8:23 AM Icenowy Zheng <icenowy@...eed.com> wrote: > Allwinner R329 SoC has two pin controllers similar to ones on previous > SoCs, one in CPUX power domain and another in CPUS. > > This patch adds support for the CPUX domain pin controller. > > Signed-off-by: Icenowy Zheng <icenowy@...eed.com> Can you send the pin control changes separately? Also the bindings. Then they can be reviewed and merged separately so I don't have to pick out the stuff I can apply. Yours, Linus Walleij
Powered by blists - more mailing lists