linux-kernel - Re: [PATCH V4 1/4] arm64: dts: sc7280: Add QSPI node

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Message-ID: <4b676cb57f0c179df56bb7681555d409@codeaurora.org>
Date:   Wed, 11 Aug 2021 17:44:21 +0530
From:   rajpat@...eaurora.org
To:     Matthias Kaehlcke <mka@...omium.org>
Cc:     Andy Gross <agross@...nel.org>,
        Bjorn Andersson <bjorn.andersson@...aro.org>,
        Rob Herring <robh+dt@...nel.org>,
        linux-arm-msm@...r.kernel.org, linux-kernel@...r.kernel.org,
        devicetree@...r.kernel.org, rnayak@...eaurora.org,
        saiprakash.ranjan@...eaurora.org, msavaliy@....qualcomm.com,
        skakit@...eaurora.org, Roja Rani Yarubandi <rojay@...eaurora.org>
Subject: Re: [PATCH V4 1/4] arm64: dts: sc7280: Add QSPI node

On 2021-07-26 21:37, Matthias Kaehlcke wrote:
> On Mon, Jul 26, 2021 at 07:10:44PM +0530, Rajesh Patil wrote:
>> From: Roja Rani Yarubandi <rojay@...eaurora.org>
>> 
>> Add QSPI DT node for SC7280 SoC.
>> 
>> Signed-off-by: Roja Rani Yarubandi <rojay@...eaurora.org>
>> Signed-off-by: Rajesh Patil <rajpat@...eaurora.org>
>> ---
>> Changes in V4:
>>  - As per Stephen's comment updated spi-max-frequency to 37.5MHz, 
>> moved
>>    qspi_opp_table from /soc to / (root).
>> 
>> Changes in V3:
>>  - Broken the huge V2 patch into 3 smaller patches.
>>    1. QSPI DT nodes
>>    2. QUP wrapper_0 DT nodes
>>    3. QUP wrapper_1 DT nodes
>> 
>> Changes in V2:
>>  - As per Doug's comments removed pinmux/pinconf subnodes.
>>  - As per Doug's comments split of SPI, UART nodes has been done.
>>  - Moved QSPI node before aps_smmu as per the order.
>> 
>>  arch/arm64/boot/dts/qcom/sc7280-idp.dts | 27 ++++++++++++++
>>  arch/arm64/boot/dts/qcom/sc7280.dtsi    | 62 
>> +++++++++++++++++++++++++++++++++
>>  2 files changed, 89 insertions(+)
>> 
>> diff --git a/arch/arm64/boot/dts/qcom/sc7280-idp.dts 
>> b/arch/arm64/boot/dts/qcom/sc7280-idp.dts
>> index 73225e3..b0bfd8e 100644
>> --- a/arch/arm64/boot/dts/qcom/sc7280-idp.dts
>> +++ b/arch/arm64/boot/dts/qcom/sc7280-idp.dts
>> @@ -269,6 +269,20 @@
>>  		};
>>  };
>> 
>> +&qspi {
>> +	status = "okay";
>> +	pinctrl-names = "default";
>> +	pinctrl-0 = <&qspi_clk>, <&qspi_cs0>, <&qspi_data01>;
>> +
>> +	flash@0 {
>> +		compatible = "jedec,spi-nor";
>> +		reg = <0>;
>> +		spi-max-frequency = <37500000>;
>> +		spi-tx-bus-width = <2>;
>> +		spi-rx-bus-width = <2>;
>> +	};
>> +};
>> +
>>  &qupv3_id_0 {
>>  	status = "okay";
>>  };
>> @@ -346,6 +360,19 @@
>> 
>>  /* PINCTRL - additions to nodes defined in sc7280.dtsi */
>> 
>> +&qspi_cs0 {
>> +	bias-disable;
>> +};
>> +
>> +&qspi_clk {
>> +	bias-disable;
>> +};
>> +
>> +&qspi_data01 {
>> +	/* High-Z when no transfers; nice to park the lines */
>> +	bias-pull-up;
>> +};
>> +
> 
> This configures the SPI flash of the SC7280 IDP board, which is neither
> mentioned in the subject nor the body of the commit message. IMO this
> should be split out into a separate patch.

Okay.