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Message-ID: <552cd7bd2ae6635cf97e03be590f6e93@codeaurora.org>
Date: Wed, 11 Aug 2021 17:47:31 +0530
From: rajpat@...eaurora.org
To: Stephen Boyd <sboyd@...nel.org>
Cc: Andy Gross <agross@...nel.org>,
Bjorn Andersson <bjorn.andersson@...aro.org>,
Rob Herring <robh+dt@...nel.org>,
linux-arm-msm@...r.kernel.org, linux-kernel@...r.kernel.org,
devicetree@...r.kernel.org, rnayak@...eaurora.org,
saiprakash.ranjan@...eaurora.org, msavaliy@....qualcomm.com,
skakit@...eaurora.org, Roja Rani Yarubandi <rojay@...eaurora.org>
Subject: Re: [PATCH V4 2/4] arm64: dts: sc7280: Add QUPv3 wrapper_0 nodes
On 2021-07-28 00:50, Stephen Boyd wrote:
> Quoting Rajesh Patil (2021-07-26 06:40:45)
>> diff --git a/arch/arm64/boot/dts/qcom/sc7280.dtsi
>> b/arch/arm64/boot/dts/qcom/sc7280.dtsi
>> index ca6e36b..455e58f 100644
>> --- a/arch/arm64/boot/dts/qcom/sc7280.dtsi
>> +++ b/arch/arm64/boot/dts/qcom/sc7280.dtsi
>> @@ -520,6 +520,25 @@
>>
>> };
>>
>> + qup_opp_table: qup-opp-table {
>
> Surely this can live underneath a qup node parallel to the i2c and spi
> devices?
>
But this is common to both qup0 and qup1 right?
>> + compatible = "operating-points-v2";
>> +
>> + opp-75000000 {
>> + opp-hz = /bits/ 64 <75000000>;
>> + required-opps = <&rpmhpd_opp_low_svs>;
>> + };
>> +
>> + opp-100000000 {
>> + opp-hz = /bits/ 64 <100000000>;
>> + required-opps = <&rpmhpd_opp_svs>;
>> + };
>> +
>> + opp-128000000 {
>> + opp-hz = /bits/ 64 <128000000>;
>> + required-opps = <&rpmhpd_opp_nom>;
>> + };
>> + };
>> +
>> qupv3_id_0: geniqup@...000 {
>> compatible = "qcom,geni-se-qup";
>> reg = <0 0x009c0000 0 0x2000>;
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