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Message-ID: <CACRpkda+t4ZhL1bP1a6Cwnh9rYH9Hj59_7VLg45KV+Va5iBR9w@mail.gmail.com>
Date:   Wed, 11 Aug 2021 15:14:59 +0200
From:   Linus Walleij <linus.walleij@...aro.org>
To:     Andy Shevchenko <andriy.shevchenko@...ux.intel.com>
Cc:     linux-kernel <linux-kernel@...r.kernel.org>,
        "open list:GPIO SUBSYSTEM" <linux-gpio@...r.kernel.org>,
        ACPI Devel Maling List <linux-acpi@...r.kernel.org>,
        Thomas Gleixner <tglx@...utronix.de>,
        Ingo Molnar <mingo@...hat.com>, Borislav Petkov <bp@...en8.de>,
        "maintainer:X86 ARCHITECTURE (32-BIT AND 64-BIT)" <x86@...nel.org>,
        "H. Peter Anvin" <hpa@...or.com>,
        Hans de Goede <hdegoede@...hat.com>,
        Bartosz Golaszewski <bgolaszewski@...libre.com>,
        "Rafael J. Wysocki" <rjw@...ysocki.net>
Subject: Re: [PATCH v1 1/1] x86/platform: Increase maximum GPIO number for X86_64

On Fri, Aug 6, 2021 at 4:44 PM Andy Shevchenko
<andriy.shevchenko@...ux.intel.com> wrote:

> By default the 512 GPIOs is a maximum on any x86 platform.
> With, for example, Intel Tiger Lake-H the SoC based controller
> occupies up to 480 pins. This leaves only 32 available for
> GPIO expanders or other drivers, like PMIC. Hence, bump the
> maximum GPIO number to 1024 for X86_64 and leave 512 for X86_32.
>
> Signed-off-by: Andy Shevchenko <andriy.shevchenko@...ux.intel.com>

Looks reasonable to me.
The goal with the whole descriptor refactoring is to get this
completely dynamic but it turns out to take forever. It is as it
is.

Reviewed-by: Linus Walleij <linus.walleij@...aro.org>

Yours,
Linus Walleij

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