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Message-Id: <20210812233753.104217-13-vgupta@kernel.org>
Date: Thu, 12 Aug 2021 16:37:46 -0700
From: Vineet Gupta <vgupta@...nel.org>
To: linux-snps-arc@...ts.infradead.org
Cc: linux-kernel@...r.kernel.org, linux-mm@...ck.org,
Anshuman Khandual <anshuman.khandual@....com>,
Mike Rapoport <rppt@...nel.org>,
Vineet Gupta <vgupta@...nel.org>,
Jose Abreu <joabreu@...opsys.com>
Subject: [PATCH v2 12/19] ARC: mm: move MMU specific bits out of entry code ...
... to avoid polluting shared entry code (across three ISA variants)
with ISA/MMU specific code.
Cc: Jose Abreu <joabreu@...opsys.com>
Signed-off-by: Vineet Gupta <vgupta@...nel.org>
---
arch/arc/include/asm/mmu.h | 8 ++++++++
arch/arc/kernel/entry-arcv2.S | 1 +
arch/arc/kernel/entry.S | 7 ++-----
3 files changed, 11 insertions(+), 5 deletions(-)
diff --git a/arch/arc/include/asm/mmu.h b/arch/arc/include/asm/mmu.h
index 0b117ea07048..414a27e806b6 100644
--- a/arch/arc/include/asm/mmu.h
+++ b/arch/arc/include/asm/mmu.h
@@ -84,6 +84,14 @@ static inline int is_pae40_enabled(void)
extern int pae40_exist_but_not_enab(void);
+#else
+
+.macro ARC_MMU_REENABLE reg
+ lr \reg, [ARC_REG_PID]
+ or \reg, \reg, MMU_ENABLE
+ sr \reg, [ARC_REG_PID]
+.endm
+
#endif /* !__ASSEMBLY__ */
#endif
diff --git a/arch/arc/kernel/entry-arcv2.S b/arch/arc/kernel/entry-arcv2.S
index 12d5f12d10d2..a7e6a2174187 100644
--- a/arch/arc/kernel/entry-arcv2.S
+++ b/arch/arc/kernel/entry-arcv2.S
@@ -10,6 +10,7 @@
#include <asm/errno.h>
#include <asm/arcregs.h>
#include <asm/irqflags.h>
+#include <asm/mmu.h>
; A maximum number of supported interrupts in the core interrupt controller.
; This number is not equal to the maximum interrupt number (256) because
diff --git a/arch/arc/kernel/entry.S b/arch/arc/kernel/entry.S
index 2cb8dfe866b6..dd77a0c8f740 100644
--- a/arch/arc/kernel/entry.S
+++ b/arch/arc/kernel/entry.S
@@ -101,11 +101,8 @@ ENTRY(EV_MachineCheck)
lr r0, [efa]
mov r1, sp
- ; hardware auto-disables MMU, re-enable it to allow kernel vaddr
- ; access for say stack unwinding of modules for crash dumps
- lr r3, [ARC_REG_PID]
- or r3, r3, MMU_ENABLE
- sr r3, [ARC_REG_PID]
+ ; MC excpetions disable MMU
+ ARC_MMU_REENABLE r3
lsr r3, r2, 8
bmsk r3, r3, 7
--
2.25.1
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