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Message-ID: <CA+V-a8unn87anEBKfMLg4D2fK20B7=2ctMQ1x9W5+Jq9RdtikQ@mail.gmail.com>
Date: Thu, 12 Aug 2021 09:25:13 +0100
From: "Lad, Prabhakar" <prabhakar.csengg@...il.com>
To: Geert Uytterhoeven <geert@...ux-m68k.org>
Cc: Lad Prabhakar <prabhakar.mahadev-lad.rj@...renesas.com>,
Rob Herring <robh+dt@...nel.org>,
Linus Walleij <linus.walleij@...aro.org>,
Magnus Damm <magnus.damm@...il.com>,
"open list:GPIO SUBSYSTEM" <linux-gpio@...r.kernel.org>,
"open list:OPEN FIRMWARE AND FLATTENED DEVICE TREE BINDINGS"
<devicetree@...r.kernel.org>,
Linux-Renesas <linux-renesas-soc@...r.kernel.org>,
Linux Kernel Mailing List <linux-kernel@...r.kernel.org>,
Biju Das <biju.das.jz@...renesas.com>
Subject: Re: [PATCH v4 2/4] pinctrl: renesas: Add RZ/G2L pin and gpio
controller driver
Hi Geert,
Thank you for the review.
On Tue, Aug 10, 2021 at 10:13 AM Geert Uytterhoeven
<geert@...ux-m68k.org> wrote:
>
> Hi Prabhakar,
>
> On Tue, Jul 27, 2021 at 1:23 PM Lad Prabhakar
> <prabhakar.mahadev-lad.rj@...renesas.com> wrote:
> > Add support for pin and gpio controller driver for RZ/G2L SoC.
> >
> > Based on a patch in the BSP by Hien Huynh <hien.huynh.px@...esas.com>.
> >
> > Signed-off-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@...renesas.com>
> > Reviewed-by: Biju Das <biju.das.jz@...renesas.com>
>
> Thanks for your patch!
>
> > --- /dev/null
> > +++ b/drivers/pinctrl/renesas/pinctrl-rzg2l.c
>
> > +static void rzg2l_pinctrl_clk_disable(void *data)
> > +{
> > + struct clk *clk = data;
>
> No need for the intermediate variable.
>
Agreed.
> > +
> > + clk_disable_unprepare(clk);
> > +}
> > +
> > +static int rzg2l_pinctrl_probe(struct platform_device *pdev)
> > +{
> > + struct rzg2l_pinctrl *pctrl;
> > + int ret;
> > +
> > + pctrl = devm_kzalloc(&pdev->dev, sizeof(*pctrl), GFP_KERNEL);
> > + if (!pctrl)
> > + return -ENOMEM;
> > +
> > + pctrl->dev = &pdev->dev;
> > +
> > + pctrl->data = of_device_get_match_data(&pdev->dev);
> > + if (!pctrl->data)
> > + return -EINVAL;
> > +
> > + pctrl->base = devm_platform_ioremap_resource(pdev, 0);
> > + if (IS_ERR(pctrl->base))
> > + return PTR_ERR(pctrl->base);
> > +
> > + pctrl->clk = devm_clk_get(pctrl->dev, NULL);
> > + if (IS_ERR(pctrl->clk)) {
> > + ret = PTR_ERR(pctrl->clk);
> > + dev_err(pctrl->dev, "failed to get GPIO clk : %i\n", ret);
> > + return ret;
> > + };
> > +
> > + spin_lock_init(&pctrl->lock);
> > +
> > + platform_set_drvdata(pdev, pctrl);
> > +
> > + ret = clk_prepare_enable(pctrl->clk);
> > + if (ret) {
> > + dev_err(pctrl->dev, "failed to enable GPIO clk: %i\n", ret);
> > + return ret;
> > + };
> > +
> > + ret = devm_add_action_or_reset(&pdev->dev, rzg2l_pinctrl_clk_disable, pctrl->clk);
>
> This line is a bit long.
>
> > + if (ret) {
> > + dev_err(pctrl->dev, "failed to register pinctrl clk disable devm action, %i\n",
>
> Elsewhere, this is called the "GPIO clk".
> This line is a bit long.
>
agreed.
> > + ret);
> > + return ret;
> > + }
> > +
> > + ret = rzg2l_pinctrl_register(pctrl);
> > + if (ret)
> > + return ret;
> > +
> > + dev_info(pctrl->dev, "%s support registered\n", DRV_NAME);
> > + return 0;
> > +}
>
> Reviewed-by: Geert Uytterhoeven <geert+renesas@...der.be>
> i.e. will queue in renesas-pinctrl-for-v5.15, with the above fixed, so no need
> to resend.
>
Thank you.
Cheers,
Prabhakar
> Gr{oetje,eeting}s,
>
> Geert
>
> --
> Geert Uytterhoeven -- There's lots of Linux beyond ia32 -- geert@...ux-m68k.org
>
> In personal conversations with technical people, I call myself a hacker. But
> when I'm talking to journalists I just say "programmer" or something like that.
> -- Linus Torvalds
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