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Message-ID: <20210812085846.2628-12-dawei.chien@mediatek.com>
Date:   Thu, 12 Aug 2021 16:58:38 +0800
From:   Dawei Chien <dawei.chien@...iatek.com>
To:     Georgi Djakov <georgi.djakov@...aro.org>,
        Rob Herring <robh+dt@...nel.org>,
        Matthias Brugger <matthias.bgg@...il.com>,
        Stephen Boyd <swboyd@...omium.org>,
        Ryan Case <ryandcase@...omium.org>
CC:     Mark Rutland <mark.rutland@....com>,
        Nicolas Boichat <drinkcat@...gle.com>,
        <devicetree@...r.kernel.org>, <linux-pm@...r.kernel.org>,
        <linux-kernel@...r.kernel.org>,
        <linux-mediatek@...ts.infradead.org>,
        <linux-arm-kernel@...ts.infradead.org>,
        Fan Chen <fan.chen@...iatek.com>,
        Arvin Wang <arvin.wang@...iatek.com>,
        James Liao <jamesjj.liao@...iatek.com>,
        Dawei Chien <dawei.chien@...iatek.com>
Subject: [V11,PATCH 11/19] dt-bindings: interconnect: add MT8195 interconnect dt-bindings

Add interconnect provider dt-bindings for MT8195

Signed-off-by: Dawei Chien <dawei.chien@...iatek.com>
---
 include/dt-bindings/interconnect/mtk,mt8195-emi.h | 42 +++++++++++++++++++++++
 1 file changed, 42 insertions(+)
 create mode 100644 include/dt-bindings/interconnect/mtk,mt8195-emi.h

diff --git a/include/dt-bindings/interconnect/mtk,mt8195-emi.h b/include/dt-bindings/interconnect/mtk,mt8195-emi.h
new file mode 100644
index 000000000000..c7e8b805f8bd
--- /dev/null
+++ b/include/dt-bindings/interconnect/mtk,mt8195-emi.h
@@ -0,0 +1,42 @@
+/* SPDX-License-Identifier: GPL-2.0 */
+/*
+ * Copyright (c) 2020 MediaTek Inc.
+ */
+
+#ifndef __DT_BINDINGS_INTERCONNECT_MTK_MT8195_EMI_H
+#define __DT_BINDINGS_INTERCONNECT_MTK_MT8195_EMI_H
+
+#define MT8195_SLAVE_DDR_EMI		0
+#define MT8195_MASTER_MCUSYS		1
+#define MT8195_MASTER_GPUSYS		2
+#define MT8195_MASTER_MMSYS		3
+#define MT8195_MASTER_MM_VPU		4
+#define MT8195_MASTER_MM_DISP		5
+#define MT8195_MASTER_MM_VDEC		6
+#define MT8195_MASTER_MM_VENC		7
+#define MT8195_MASTER_MM_CAM		8
+#define MT8195_MASTER_MM_IMG		9
+#define MT8195_MASTER_MM_MDP		10
+#define MT8195_MASTER_VPUSYS		11
+#define MT8195_MASTER_VPU_0		12
+#define MT8195_MASTER_VPU_1		13
+#define MT8195_MASTER_MDLASYS		14
+#define MT8195_MASTER_MDLA_0		15
+#define MT8195_MASTER_UFS		16
+#define MT8195_MASTER_PCIE_0		17
+#define MT8195_MASTER_PCIE_1		18
+#define MT8195_MASTER_USB		19
+#define MT8195_MASTER_DBGIF		20
+#define MT8195_SLAVE_HRT_DDR_EMI	21
+#define MT8195_MASTER_HRT_MMSYS		22
+#define MT8195_MASTER_HRT_MM_DISP	23
+#define MT8195_MASTER_HRT_MM_VDEC	24
+#define MT8195_MASTER_HRT_MM_VENC	25
+#define MT8195_MASTER_HRT_MM_CAM	26
+#define MT8195_MASTER_HRT_MM_IMG	27
+#define MT8195_MASTER_HRT_MM_MDP	28
+#define MT8195_MASTER_HRT_DBGIF		29
+#define MT8195_MASTER_WIFI		30
+#define MT8195_MASTER_BT		31
+#define MT8195_MASTER_NETSYS		32
+#endif
-- 
2.14.1

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