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Date:   Fri, 13 Aug 2021 12:02:15 +0200
From:   Philipp Zabel <p.zabel@...gutronix.de>
To:     Billy Tsai <billy_tsai@...eedtech.com>, lee.jones@...aro.org,
        robh+dt@...nel.org, joel@....id.au, andrew@...id.au,
        thierry.reding@...il.com, u.kleine-koenig@...gutronix.de,
        devicetree@...r.kernel.org, linux-arm-kernel@...ts.infradead.org,
        linux-aspeed@...ts.ozlabs.org, linux-kernel@...r.kernel.org,
        linux-pwm@...r.kernel.org
Cc:     BMC-SW@...eedtech.com
Subject: Re: [v11 2/2] pwm: Add Aspeed ast2600 PWM support

Hi Billy,

On Thu, 2021-08-12 at 12:09 +0800, Billy Tsai wrote:
> This patch add the support of PWM controller which can be found at aspeed
> ast2600 soc. The pwm supoorts up to 16 channels and it's part function
> of multi-function device "pwm-tach controller".
> 
> Signed-off-by: Billy Tsai <billy_tsai@...eedtech.com>
> ---
[...]
> diff --git a/drivers/pwm/pwm-aspeed-ast2600.c b/drivers/pwm/pwm-aspeed-ast2600.c
> new file mode 100644
> index 000000000000..f89ce1d4cd67
> --- /dev/null
> +++ b/drivers/pwm/pwm-aspeed-ast2600.c
> @@ -0,0 +1,327 @@
[...]
> +static int aspeed_pwm_probe(struct platform_device *pdev)
> +{
[...]
> +	priv->clk = devm_clk_get(&parent_dev->dev, 0);
> +	if (IS_ERR(priv->clk))
> +		return dev_err_probe(dev, PTR_ERR(priv->clk),
> +				     "Couldn't get clock\n");
> +
> +	ret = clk_prepare_enable(priv->clk);
> +	if (ret)
> +		return dev_err_probe(dev, ret, "Couldn't enable clock\n");
> +
> +	priv->reset = devm_reset_control_get_shared(&parent_dev->dev, NULL);
> +	if (IS_ERR(priv->reset)) {
> +		ret = dev_err_probe(dev, PTR_ERR(priv->reset),
> +				    "Get reset failed\n");
> +		goto err_disable_clk;
> +	}

I suggest to request the reset control before enabling the clock. That
way you can simplify the error path and avoid enabling the clock in case
of reset_control_get failure.

regards
Philipp

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