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Message-ID: <20210813101305.GA598827@rocinante>
Date: Fri, 13 Aug 2021 12:13:05 +0200
From: Krzysztof Wilczyński <kw@...ux.com>
To: Krzysztof Hałasa <khalasa@...p.pl>
Cc: Bjorn Helgaas <bhelgaas@...gle.com>, linux-pci@...r.kernel.org,
Artem Lapkin <email2tema@...il.com>,
Neil Armstrong <narmstrong@...libre.com>,
Huacai Chen <chenhuacai@...il.com>,
Rob Herring <robh@...nel.org>,
Lorenzo Pieralisi <lorenzo.pieralisi@....com>,
Richard Zhu <hongxing.zhu@....com>,
Lucas Stach <l.stach@...gutronix.de>,
linux-kernel@...r.kernel.org
Subject: Re: [PATCH] PCIe: limit Max Read Request Size on i.MX to 512 bytes
Hi Krzysztof,
[...]
> This patch makes the RTL8111 work on i.MX6.
Would it be possible to implement this particular MRRS fix as a quirk
only for the i.MX6 controller? Unless this is something that we need in
the core, a quirk would be preferred over something that changes the PCI
core.
An example of such quirk might be the one currently implemented for the
Loongson controller, as per:
https://elixir.bootlin.com/linux/v5.14-rc5/source/drivers/pci/controller/pci-loongson.c#L63
Krzysztof
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