linux-kernel - Re: [PATCH] PCIe: limit Max Read Request Size on i.MX to 512 bytes

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Message-ID: <CAL_JsqL1bPwbPB-3y6s0d6XoNkjrSzpbx=p7BcTq8UyTbh8pvw@mail.gmail.com>
Date:   Fri, 13 Aug 2021 08:45:43 -0500
From:   Rob Herring <robh@...nel.org>
To:     Krzysztof Hałasa <khalasa@...p.pl>
Cc:     Bjorn Helgaas <bhelgaas@...gle.com>,
        PCI <linux-pci@...r.kernel.org>,
        Artem Lapkin <email2tema@...il.com>,
        Neil Armstrong <narmstrong@...libre.com>,
        Huacai Chen <chenhuacai@...il.com>,
        Lorenzo Pieralisi <lorenzo.pieralisi@....com>,
        Krzysztof Wilczyński <kw@...ux.com>,
        Richard Zhu <hongxing.zhu@....com>,
        Lucas Stach <l.stach@...gutronix.de>,
        "linux-kernel@...r.kernel.org" <linux-kernel@...r.kernel.org>
Subject: Re: [PATCH] PCIe: limit Max Read Request Size on i.MX to 512 bytes

On Fri, Aug 13, 2021 at 3:52 AM Krzysztof Hałasa <khalasa@...p.pl> wrote:
>
> DWC PCIe controller imposes limits on the Read Request Size that it can
> handle. For i.MX6 family it's fixed at 512 bytes by default.
>
> If a memory read larger than the limit is requested, the CPU responds
> with Completer Abort (CA) (on i.MX6 Unsupported Request (UR) is returned
> instead due to a design error).
>
> The i.MX6 documentation states that the limit can be changed by writing
> to the PCIE_PL_MRCCR0 register, however there is a fixed (and
> undocumented) maximum (CX_REMOTE_RD_REQ_SIZE constant). Tests indicate
> that values larger than 512 bytes don't work, though.
>
> This patch makes the RTL8111 work on i.MX6.
>
> Signed-off-by: Krzysztof Hałasa <khalasa@...p.pl>
>
> diff --git a/drivers/pci/Kconfig b/drivers/pci/Kconfig
> index 0c473d75e625..a11ec93a8cd0 100644
> --- a/drivers/pci/Kconfig
> +++ b/drivers/pci/Kconfig
> @@ -34,6 +34,9 @@ config PCI_DOMAINS_GENERIC
>  config PCI_SYSCALL
>         bool
>
> +config NEED_PCIE_MAX_MRRS

We don't need a config option for this. It's not much code and it will
effectively always be enabled with multi-platform kernels.

Rob